esp-idf/tools/unit-test-app/sdkconfig.defaults.esp32s2

CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y
CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n

CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
CONFIG_ESP32S2_ULP_COPROC_RISCV=y
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096
unit-test-app: fix chip-specific sdkconfig options DEFAULT_CPU_FREQ and ULP_COPROC_ENABLED options have chip-specific names, and should be set in a chip-specific sdkconfig.defaults file. This commit also changes the default CPU frequency for ESP32S2 unit tests to 240 MHz. 2019-09-10 15:23:30 +02:00			`CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y`
Security: ESP32C3 memory protection feature (IRAM0/DRAM0) Software support for PMS module. Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W) On/locked by default, configurable in Kconfig (esp_system) Closes https://jira.espressif.com:8443/browse/IDF-2092 2021-01-04 19:38:10 +01:00			`CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n`
ulp: added support to building code for riscv ULP coprocessor 2020-04-17 16:34:56 -03:00
unit-test-app: fix chip-specific sdkconfig options DEFAULT_CPU_FREQ and ULP_COPROC_ENABLED options have chip-specific names, and should be set in a chip-specific sdkconfig.defaults file. This commit also changes the default CPU frequency for ESP32S2 unit tests to 240 MHz. 2019-09-10 15:23:30 +02:00			`CONFIG_ESP32S2_ULP_COPROC_ENABLED=y`
ulp: added support to building code for riscv ULP coprocessor 2020-04-17 16:34:56 -03:00			`CONFIG_ESP32S2_ULP_COPROC_RISCV=y`
Whitespace: Automated whitespace fixes (large commit) Apply the pre-commit hook whitespace fixes to all files in the repo. (Line endings, blank lines at end of file, trailing whitespace) 2020-11-10 18:40:01 +11:00			`CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096`