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			164 lines
		
	
	
		
			6.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			164 lines
		
	
	
		
			6.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
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								// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
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								//
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								// Licensed under the Apache License, Version 2.0 (the "License");
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								// you may not use this file except in compliance with the License.
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								// You may obtain a copy of the License at
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								//
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								//     http://www.apache.org/licenses/LICENSE-2.0
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								//
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								// Unless required by applicable law or agreed to in writing, software
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								// distributed under the License is distributed on an "AS IS" BASIS,
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								// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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								// See the License for the specific language governing permissions and
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								// limitations under the License.
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								#pragma once
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								#ifdef __cplusplus
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								extern "C" {
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								#endif
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								#include <stdint.h>
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								/******************Basic PHY Registers*******************/
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								/**
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								 * @brief BMCR(Basic Mode Control Register)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t reserved : 7;          /*!< Reserved */
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								        uint32_t collision_test : 1;    /*!< Collision test */
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								        uint32_t duplex_mode : 1;       /*!< Duplex mode:Full Duplex(1) and Half Duplex(0) */
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								        uint32_t restart_auto_nego : 1; /*!< Restart auto-negotiation */
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								        uint32_t isolate : 1;           /*!< Isolate the PHY from MII except the SMI interface */
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								        uint32_t power_down : 1;        /*!< Power off PHY except SMI interface */
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								        uint32_t en_auto_nego : 1;      /*!< Enable auto negotiation */
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								        uint32_t speed_select : 1;      /*!< Select speed: 100Mbps(1) and 10Mbps(0) */
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								        uint32_t en_loopback : 1;       /*!< Enables transmit data to be routed to the receive path */
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								        uint32_t reset : 1;             /*!< Reset PHY registers. This bit is self-clearing. */
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								    };
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								    uint32_t val;
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								} bmcr_reg_t;
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								#define ETH_PHY_BMCR_REG_ADDR (0x00)
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								/**
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								 * @brief BMSR(Basic Mode Status Register)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t ext_capability : 1;       /*!< Extended register capability */
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								        uint32_t jabber_detect : 1;        /*!< Jabber condition detected */
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								        uint32_t link_status : 1;          /*!< Link status */
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								        uint32_t auto_nego_ability : 1;    /*!< Auto negotiation ability */
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								        uint32_t remote_fault : 1;         /*!< Remote fault detected */
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								        uint32_t auto_nego_complete : 1;   /*!< Auto negotiation completed */
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								        uint32_t mf_preamble_suppress : 1; /*!< Preamble suppression capability for management frame */
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								        uint32_t reserved : 1;             /*!< Reserved */
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								        uint32_t ext_status : 1;           /*!< Extended Status */
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								        uint32_t base100_t2_hdx : 1;       /*!< 100Base-T2 Half Duplex capability */
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								        uint32_t base100_t2_fdx : 1;       /*!< 100Base-T2 Full Duplex capability */
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								        uint32_t base10_t_hdx : 1;         /*!< 10Base-T Half Duplex capability */
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								        uint32_t base10_t_fdx : 1;         /*!< 10Base-T Full Duplex capability */
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								        uint32_t base100_tx_hdx : 1;       /*!< 100Base-Tx Half Duplex capability */
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								        uint32_t base100_tx_fdx : 1;       /*!< 100Base-Tx Full Duplex capability */
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								        uint32_t based100_t4 : 1;          /*!< 100Base-T4 capability */
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								    };
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								    uint32_t val;
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								} bmsr_reg_t;
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								#define ETH_PHY_BMSR_REG_ADDR (0x01)
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								/**
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								 * @brief PHYIDR1(PHY Identifier Register 1)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t oui_msb : 16; /*!< Organizationally Unique Identifier(OUI) most significant bits */
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								    };
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								    uint32_t val;
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								} phyidr1_reg_t;
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								#define ETH_PHY_IDR1_REG_ADDR (0x02)
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								/**
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								 * @brief PHYIDR2(PHY Identifier Register 2)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t model_revision : 4; /*!< Model revision number */
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								        uint32_t vendor_model : 6;   /*!< Vendor model number */
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								        uint32_t oui_lsb : 6;        /*!< Organizationally Unique Identifier(OUI) least significant bits */
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								    };
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								    uint32_t val;
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								} phyidr2_reg_t;
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								#define ETH_PHY_IDR2_REG_ADDR (0x03)
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								/**
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								 * @brief ANAR(Auto-Negotiation Advertisement Register)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t protocol_select : 5;  /*!< Binary encoded selector supported by this PHY */
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								        uint32_t base10_t : 1;         /*!< 10Base-T support */
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								        uint32_t base10_t_fd : 1;      /*!< 10Base-T full duplex support */
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								        uint32_t base100_tx : 1;       /*!< 100Base-TX support */
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								        uint32_t base100_tx_fd : 1;    /*!< 100Base-TX full duplex support */
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								        uint32_t base100_t4 : 1;       /*!< 100Base-T4 support */
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								        uint32_t symmetric_pause : 1;  /*!< Symmetric pause support for full duplex links */
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								        uint32_t asymmetric_pause : 1; /*!< Asymmetric pause support for full duplex links */
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								        uint32_t reserved1 : 1;        /*!< Reserved */
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								        uint32_t remote_fault : 1;     /*!< Advertise remote fault detection capability */
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								        uint32_t acknowledge : 1;      /*!< Link partner ability data reception acknowledged */
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								        uint32_t next_page : 1;        /*!< Next page indication, if set, next page transfer is desired */
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								    };
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								    uint32_t val;
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								} anar_reg_t;
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								#define ETH_PHY_ANAR_REG_ADDR (0x04)
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								/**
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								 * @brief ANLPAR(Auto-Negotiation Link Partner Ability Register)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t protocol_select : 5;  /*!< Link Partner’s binary encoded node selector */
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								        uint32_t base10_t : 1;         /*!< 10Base-T support */
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								        uint32_t base10_t_fd : 1;      /*!< 10Base-T full duplex support */
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								        uint32_t base100_tx : 1;       /*!< 100Base-TX support */
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								        uint32_t base100_tx_fd : 1;    /*!< 100Base-TX full duplex support */
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								        uint32_t base100_t4 : 1;       /*!< 100Base-T4 support */
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								        uint32_t symmetric_pause : 1;  /*!< Symmetric pause supported by Link Partner */
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								        uint32_t asymmetric_pause : 1; /*!< Asymmetric pause supported by Link Partner */
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								        uint32_t reserved : 1;         /*!< Reserved */
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								        uint32_t remote_fault : 1;     /*!< Link partner is indicating a remote fault */
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								        uint32_t acknowledge : 1;      /*!< Acknowledges from link partner */
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								        uint32_t next_page : 1;        /*!< Next page indication */
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								    };
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								    uint32_t val;
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								} anlpar_reg_t;
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								#define ETH_PHY_ANLPAR_REG_ADDR (0x05)
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								/**
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								 * @brief ANER(Auto-Negotiate Expansion Register)
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								 *
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								 */
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								typedef union {
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								    struct {
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								        uint32_t link_partner_auto_nego_able : 1; /*!< Link partner auto-negotiation ability */
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								        uint32_t link_page_received : 1;          /*!< Link code word page has received */
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								        uint32_t next_page_able : 1;              /*!< Next page ablility */
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								        uint32_t link_partner_next_page_able : 1; /*!< Link partner next page ability */
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								        uint32_t parallel_detection_fault : 1;    /*!< Parallel detection fault */
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								        uint32_t reserved : 11;                   /*!< Reserved */
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								    };
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								    uint32_t val;
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								} aner_reg_t;
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								#define ETH_PHY_ANER_REG_ADDR (0x06)
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								#ifdef __cplusplus
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								}
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								#endif
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