2019-08-09 20:30:19 +08:00
										 
									 
								 
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								// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
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								//
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								// Licensed under the Apache License, Version 2.0 (the "License");
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								// you may not use this file except in compliance with the License.
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								// You may obtain a copy of the License at
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								//     http://www.apache.org/licenses/LICENSE-2.0
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								//
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								// Unless required by applicable law or agreed to in writing, software
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								// distributed under the License is distributed on an "AS IS" BASIS,
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								// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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								// See the License for the specific language governing permissions and
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								// limitations under the License.
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								// The HAL layer for LEDC (common part)
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								#include "esp_attr.h"
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								#include "hal/ledc_hal.h"
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								void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
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								{
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								    //Get hardware instance.
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								    hal->dev = LEDC_LL_GET_HW();
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								    hal->speed_mode = speed_mode;
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								}
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								void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
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								{
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								    ledc_clk_src_t clk_src = LEDC_APB_CLK;
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								    ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
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								    if (clk_src == LEDC_REF_TICK) {
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								        *clk_cfg = LEDC_USE_REF_TICK;
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								    } else {
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								        *clk_cfg = LEDC_USE_APB_CLK;
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								        if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
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								            ledc_slow_clk_sel_t slow_clk = LEDC_SLOW_CLK_APB;
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								            ledc_hal_get_slow_clk_sel(hal, &slow_clk);
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								            if (slow_clk == LEDC_SLOW_CLK_RTC8M) {
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								                *clk_cfg = LEDC_USE_RTC8M_CLK;
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								#ifdef SOC_LEDC_SUPPORT_XTAL_CLOCK
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								            } else if (slow_clk == LEDC_SLOW_CLK_XTAL) {
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								                *clk_cfg = LEDC_USE_XTAL_CLK;
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								#endif
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								            }
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								        }
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								    }
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								}
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								void ledc_hal_set_slow_clk(ledc_hal_context_t *hal, ledc_clk_cfg_t clk_cfg)
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								{
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								    // For low speed channels, if RTC_8MCLK is used as the source clock, the `slow_clk_sel` register should be cleared, otherwise it should be set.
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								    ledc_slow_clk_sel_t slow_clk_sel = LEDC_SLOW_CLK_APB;
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								#ifdef SOC_LEDC_SUPPORT_XTAL_CLOCK
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								    slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M :
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								                                       ((clk_cfg == LEDC_USE_XTAL_CLK) ? LEDC_SLOW_CLK_XTAL : LEDC_SLOW_CLK_APB);
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								#else
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								    slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M : LEDC_SLOW_CLK_APB;
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								#endif
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								    ledc_hal_set_slow_clk_sel(hal, slow_clk_sel);
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								}
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