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										 |  |  | /*
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							|  |  |  |  * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * SPDX-License-Identifier: Apache-2.0 | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #include "sdkconfig.h"
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							|  |  |  | #include "soc/soc.h"
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										 |  |  | #ifndef CONFIG_IDF_TARGET_ESP32
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							|  |  |  | #include "soc/system_reg.h"
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							|  |  |  | #endif // not CONFIG_IDF_TARGET_ESP32
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										 |  |  | #include "soc/rtc.h"
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							|  |  |  | #include "soc/rtc_cntl_reg.h"
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							|  |  |  | #include "esp_log.h"
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							|  |  |  | #include "esp_rom_sys.h"
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							|  |  |  | #include "esp_rom_uart.h"
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							|  |  |  | #include "esp_attr.h"
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							|  |  |  | static const char *TAG = "fpga"; | 
					
						
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										 |  |  | #ifdef CONFIG_IDF_TARGET_ESP32
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							|  |  |  | #include "esp32/rom/rtc.h"
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							|  |  |  | #endif
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							|  |  |  | #ifdef CONFIG_IDF_TARGET_ESP32S2
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							|  |  |  | #include "esp32s2/rom/rtc.h"
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							|  |  |  | #endif
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										 |  |  | extern void ets_update_cpu_frequency(uint32_t ticks_per_us); | 
					
						
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							|  |  |  | static void s_warn(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     ESP_EARLY_LOGW(TAG, "Project configuration is for internal FPGA use, not all functions will work"); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | void bootloader_clock_configure(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     s_warn(); | 
					
						
							|  |  |  |     esp_rom_uart_tx_wait_idle(0); | 
					
						
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							|  |  |  |     uint32_t xtal_freq_mhz = 40; | 
					
						
							|  |  |  | #ifdef CONFIG_IDF_TARGET_ESP32S2
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							|  |  |  |     uint32_t apb_freq_hz = 20000000; | 
					
						
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										 |  |  | #elif CONFIG_IDF_TARGET_ESP32H2
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										 |  |  |     uint32_t apb_freq_hz = 32000000; | 
					
						
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										 |  |  | #else
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							|  |  |  |     uint32_t apb_freq_hz = 40000000; | 
					
						
							|  |  |  | #endif // CONFIG_IDF_TARGET_ESP32S2
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							|  |  |  |     ets_update_cpu_frequency(apb_freq_hz / 1000000); | 
					
						
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										 |  |  | #ifdef RTC_APB_FREQ_REG
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							|  |  |  |     REG_WRITE(RTC_APB_FREQ_REG, (apb_freq_hz >> 12) | ((apb_freq_hz >> 12) << 16)); | 
					
						
							|  |  |  | #endif
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										 |  |  |     REG_WRITE(RTC_CNTL_STORE4_REG, (xtal_freq_mhz) | ((xtal_freq_mhz) << 16)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /* Placed in IRAM since test_apps expects it to be */ | 
					
						
							|  |  |  | void IRAM_ATTR bootloader_fill_random(void *buffer, size_t length) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     uint8_t *buffer_bytes = (uint8_t *)buffer; | 
					
						
							|  |  |  |     for (int i = 0; i < length; i++) { | 
					
						
							|  |  |  |         buffer_bytes[i] = 0x5A; | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | void esp_clk_init(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     s_warn(); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | void esp_perip_clk_init(void) | 
					
						
							|  |  |  | { | 
					
						
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							|  |  |  | } | 
					
						
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							|  |  |  | /**
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							|  |  |  |  * @brief No-op function, used to force linking this file | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | void esp_common_include_fpga_overrides(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | } |