components/soc/esp32h2/include/modem/reg_base.h

/*
 * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#pragma once
#define DR_REG_MODEM_SYSCON_BASE  0x600A5400
#define DR_REG_MODEM_LPCON_BASE   0x600AD000
clk_tree: Add basic clock support for esp32h2 - Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2 2023-02-09 15:39:38 +08:00			`/*`
soc: add modem regs and force enable i2c_ana_mst clock 2023-02-06 21:43:05 +08:00			`* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD`
			`*`
clk_tree: Add basic clock support for esp32h2 - Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2 2023-02-09 15:39:38 +08:00			`* SPDX-License-Identifier: Apache-2.0`
soc: add modem regs and force enable i2c_ana_mst clock 2023-02-06 21:43:05 +08:00			`*/`

			`#pragma once`
clk_tree: Add basic clock support for esp32h2 - Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2 2023-02-09 15:39:38 +08:00			`#define DR_REG_MODEM_SYSCON_BASE 0x600A5400`
soc: add modem regs and force enable i2c_ana_mst clock 2023-02-06 21:43:05 +08:00			`#define DR_REG_MODEM_LPCON_BASE 0x600AD000`