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										 |  |  | /*
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							|  |  |  |  * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * SPDX-License-Identifier: Apache-2.0 | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | #include "hal/rmt_hal.h"
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							|  |  |  | #include "hal/rmt_ll.h"
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										 |  |  | #include "soc/soc_caps.h"
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										 |  |  | 
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							|  |  |  | void rmt_hal_init(rmt_hal_context_t *hal) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     hal->regs = &RMT; | 
					
						
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										 |  |  |     rmt_ll_power_down_mem(hal->regs, false);               // turn on RMTMEM power domain
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							|  |  |  |     rmt_ll_enable_mem_access_nonfifo(hal->regs, true);     // APB access the RMTMEM in nonfifo mode
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							|  |  |  |     rmt_ll_enable_interrupt(hal->regs, UINT32_MAX, false); // disable all interupt events
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							|  |  |  |     rmt_ll_clear_interrupt_status(hal->regs, UINT32_MAX);  // clear all pending events
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										 |  |  |     rmt_ll_enable_group_clock(hal->regs, true);            // enable clock source
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										 |  |  | #if SOC_RMT_SUPPORT_TX_SYNCHRO
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							|  |  |  |     rmt_ll_tx_clear_sync_group(hal->regs); | 
					
						
							|  |  |  | #endif // SOC_RMT_SUPPORT_TX_SYNCHRO
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							|  |  |  | } | 
					
						
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							|  |  |  | void rmt_hal_deinit(rmt_hal_context_t *hal) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     rmt_ll_enable_interrupt(hal->regs, UINT32_MAX, false); // disable all interupt events
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							|  |  |  |     rmt_ll_clear_interrupt_status(hal->regs, UINT32_MAX);  // clear all pending events
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							|  |  |  |     rmt_ll_power_down_mem(hal->regs, true);                // turn off RMTMEM power domain
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										 |  |  |     rmt_ll_enable_group_clock(hal->regs, false);           // disable clock source
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										 |  |  |     hal->regs = NULL; | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | void rmt_hal_tx_channel_reset(rmt_hal_context_t *hal, uint32_t channel) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  |     rmt_ll_tx_reset_channels_clock_div(hal->regs, 1 << channel); | 
					
						
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										 |  |  |     rmt_ll_tx_reset_pointer(hal->regs, channel); | 
					
						
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										 |  |  | #if SOC_RMT_SUPPORT_TX_LOOP_COUNT
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							|  |  |  |     rmt_ll_tx_reset_loop_count(hal->regs, channel); | 
					
						
							|  |  |  | #endif // SOC_RMT_SUPPORT_TX_LOOP_COUNT
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							|  |  |  |     rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_TX_MASK(channel), false); | 
					
						
							|  |  |  |     rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_MASK(channel)); | 
					
						
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										 |  |  | } | 
					
						
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										 |  |  | void rmt_hal_rx_channel_reset(rmt_hal_context_t *hal, uint32_t channel) | 
					
						
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										 |  |  | { | 
					
						
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										 |  |  |     rmt_ll_rx_reset_channels_clock_div(hal->regs, 1 << channel); | 
					
						
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										 |  |  |     rmt_ll_rx_reset_pointer(hal->regs, channel); | 
					
						
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										 |  |  |     rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_RX_MASK(channel), false); | 
					
						
							|  |  |  |     rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_RX_MASK(channel)); | 
					
						
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										 |  |  | } |