mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-24 03:09:41 +01:00
bootloader: Simplify multi-chip control logic of the cache
This commit is contained in:
@@ -198,18 +198,12 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Disable(0);
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Cache_Flush(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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uint32_t autoload = Cache_Suspend_DCache();
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Cache_Invalidate_DCache_All();
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#elif CONFIG_IDF_TARGET_ESP32C3
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#elif CONFIG_IDF_TARGET_ESP32H2
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#endif
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ESP_LOGD(TAG, "mmu set paddr=%08x count=%d size=%x src_addr=%x src_addr_aligned=%x",
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src_addr & MMU_FLASH_MASK, count, size, src_addr, src_addr_aligned );
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@@ -217,34 +211,26 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
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int e = cache_flash_mmu_set(0, 0, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count);
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#elif CONFIG_IDF_TARGET_ESP32S2
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int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
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#else // S3, C3, H2
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#else
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int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK0_VADDR, src_addr_aligned, 64, count, 0);
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#endif
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if (e != 0) {
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ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Enable(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Resume_DCache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32C3
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Resume_ICache(autoload);
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#endif
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return NULL;
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}
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Enable(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Resume_DCache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32C3
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Resume_ICache(autoload);
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#endif
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mapped = true;
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@@ -260,24 +246,15 @@ void bootloader_munmap(const void *mapping)
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Cache_Read_Disable(0);
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Cache_Flush(0);
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mmu_init(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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//TODO, save the autoload value.
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Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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Cache_MMU_Init();
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Suspend_DCache();
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Cache_Invalidate_DCache_All();
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Cache_MMU_Init();
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#elif CONFIG_IDF_TARGET_ESP32C3
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//TODO, save the autoload value.
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Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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Cache_MMU_Init();
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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Cache_MMU_Init();
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#endif
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mapped = false;
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current_read_mapping = UINT32_MAX;
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@@ -303,26 +280,18 @@ static esp_err_t bootloader_flash_read_no_decrypt(size_t src_addr, void *dest, s
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Disable(0);
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Cache_Flush(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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uint32_t autoload = Cache_Suspend_ICache();
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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uint32_t autoload = Cache_Suspend_DCache();
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#elif CONFIG_IDF_TARGET_ESP32C3
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uint32_t autoload = Cache_Suspend_ICache();
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#elif CONFIG_IDF_TARGET_ESP32H2
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uint32_t autoload = Cache_Suspend_ICache();
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#endif
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esp_rom_spiflash_result_t r = esp_rom_spiflash_read(src_addr, dest, size);
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Enable(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Resume_DCache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32C3
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Resume_ICache(autoload);
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#endif
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return spi_to_esp_err(r);
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@@ -341,57 +310,39 @@ static esp_err_t bootloader_flash_read_allow_decrypt(size_t src_addr, void *dest
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Disable(0);
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Cache_Flush(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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uint32_t autoload = Cache_Suspend_DCache();
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Cache_Invalidate_DCache_All();
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#elif CONFIG_IDF_TARGET_ESP32C3
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#elif CONFIG_IDF_TARGET_ESP32H2
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uint32_t autoload = Cache_Suspend_ICache();
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Cache_Invalidate_ICache_All();
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#endif
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ESP_LOGD(TAG, "mmu set block paddr=0x%08x (was 0x%08x)", map_at, current_read_mapping);
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#if CONFIG_IDF_TARGET_ESP32
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int e = cache_flash_mmu_set(0, 0, FLASH_READ_VADDR, map_at, 64, 1);
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#elif CONFIG_IDF_TARGET_ESP32S2
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int e = Cache_Ibus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
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#elif CONFIG_IDF_TARGET_ESP32S3
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int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
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#elif CONFIG_IDF_TARGET_ESP32C3
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int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
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#elif CONFIG_IDF_TARGET_ESP32H2
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#else // map rodata with DBus
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int e = Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, MMU_BLOCK63_VADDR, map_at, 64, 1, 0);
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#endif
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if (e != 0) {
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ESP_LOGE(TAG, "cache_flash_mmu_set failed: %d\n", e);
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Enable(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Resume_DCache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32C3
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Resume_ICache(autoload);
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#endif
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return ESP_FAIL;
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}
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current_read_mapping = map_at;
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Read_Enable(0);
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32S3
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#else // access rodata with DCache
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Cache_Resume_DCache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32C3
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Cache_Resume_ICache(autoload);
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#elif CONFIG_IDF_TARGET_ESP32H2
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Cache_Resume_ICache(autoload);
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#endif
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}
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map_ptr = (uint32_t *)(FLASH_READ_VADDR + (word_src - map_at));
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