espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-30 02:37:19 +02:00
Code Issues Packages Projects Releases Wiki Activity

feat(ble_mesh): add cas operation for bt_mesh_atomic_val_t

Browse Source
This commit is contained in:
luoxu
2024-06-18 10:53:35 +08:00
committed by BOT
parent 3bb82f7ce4
commit 006086c50b
2 changed files with 45 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
components/bt/esp_ble_mesh/mesh_common/include/mesh_atomic.h
View File

@ -147,6 +147,33 @@ static inline bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target,
extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value); extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value);
#endif #endif
/**
* @brief Atomic CAS operation.
*
* This compares the contents of @a *target
* with the contents of @a excepted. If equal,
* the operation is a read-modify-write operation
* that writes @a new_val into @a *target and return true.
* If they are not equal, the operation is a read
* and return false.
*
* @param target Address of atomic variable.
* @param excepted Value of excepted.
* @param new_val Write value if compare sunncess.
*
* @return
* - true: write operation succeeded.
* - false: write operation failed.
*/
#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN
static inline bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val)
{
return __atomic_compare_exchange_n(target, &excepted, &new_val, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
}
#else
extern bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val);
#endif
/** /**
* @cond INTERNAL_HIDDEN * @cond INTERNAL_HIDDEN
*/ */

19
components/bt/esp_ble_mesh/mesh_common/mesh_atomic.c
View File

@ -13,7 +13,7 @@
/* /*
* SPDX-FileCopyrightText: 2016 Intel Corporation * SPDX-FileCopyrightText: 2016 Intel Corporation
* SPDX-FileCopyrightText: 2011-2014 Wind River Systems, Inc. * SPDX-FileCopyrightText: 2011-2014 Wind River Systems, Inc.
* SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -170,4 +170,21 @@ bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target)
return ret; return ret;
} }
bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val)
{
bt_mesh_atomic_val_t ret = 0;
bt_mesh_atomic_lock();
ret = *target;
if (*target == excepted) {
*target = new_val;
bt_mesh_atomic_unlock();
return true;
}
bt_mesh_atomic_unlock();
return false;
}
#endif /* #ifndef CONFIG_ATOMIC_OPERATIONS_BUILTIN */ #endif /* #ifndef CONFIG_ATOMIC_OPERATIONS_BUILTIN */