From 3ed226c362b97c8b79b742b1f060b9b7c65ee3df Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Tue, 19 Jan 2021 19:55:14 +0800 Subject: [PATCH] efuse(esp32c3): Adds getting chip_revision and chip_pkg --- .../src/bootloader_efuse_esp32c3.c | 6 +-- components/efuse/esp32c3/esp_efuse_table.c | 42 +++++++++++++++++-- components/efuse/esp32c3/esp_efuse_table.csv | 8 +++- .../efuse/esp32c3/include/esp_efuse_table.h | 6 ++- .../efuse/src/esp32c3/esp_efuse_fields.c | 4 +- components/esp32c3/system_api_esp32c3.c | 2 + components/esptool_py/esptool | 2 +- .../soc/esp32c3/include/soc/efuse_reg.h | 22 +++++++--- 8 files changed, 75 insertions(+), 17 deletions(-) diff --git a/components/bootloader_support/src/bootloader_efuse_esp32c3.c b/components/bootloader_support/src/bootloader_efuse_esp32c3.c index 196825a007..df0fa290d3 100644 --- a/components/bootloader_support/src/bootloader_efuse_esp32c3.c +++ b/components/bootloader_support/src/bootloader_efuse_esp32c3.c @@ -13,16 +13,16 @@ // limitations under the License. #include +#include "soc/efuse_reg.h" uint8_t bootloader_common_get_chip_revision(void) { // should return the same value as esp_efuse_get_chip_ver() - /* No other revisions for ESP32-C3 */ - return 0; + return REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_WAFER_VERSION); } uint32_t bootloader_common_get_chip_ver_pkg(void) { // should return the same value as esp_efuse_get_pkg_ver() - return 0; + return REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_PKG_VERSION); } diff --git a/components/efuse/esp32c3/esp_efuse_table.c b/components/efuse/esp32c3/esp_efuse_table.c index 06fef0781f..6b93f3b636 100644 --- a/components/efuse/esp32c3/esp_efuse_table.c +++ b/components/efuse/esp32c3/esp_efuse_table.c @@ -17,7 +17,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table 96cd6235ddc0947b4a296add3f942acb +// md5_digest_table 69693bb96832f42833460571ebc1f865 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -392,8 +392,24 @@ static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = { {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7, }; +static const esp_efuse_desc_t WAFER_VERSION[] = { + {EFUSE_BLK1, 114, 3}, // WAFER version, +}; + +static const esp_efuse_desc_t PKG_VERSION[] = { + {EFUSE_BLK1, 117, 3}, // Package version 0:ESP32C3, +}; + +static const esp_efuse_desc_t BLOCK1_VERSION[] = { + {EFUSE_BLK1, 120, 3}, // BLOCK1 efuse version, +}; + +static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = { + {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID, +}; + static const esp_efuse_desc_t BLOCK2_VERSION[] = { - {EFUSE_BLK2, 128, 3}, // Version of Block2, + {EFUSE_BLK2, 128, 3}, // Version of BLOCK2, }; static const esp_efuse_desc_t TEMP_CALIB[] = { @@ -932,8 +948,28 @@ const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = { NULL }; +const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[] = { + &WAFER_VERSION[0], // WAFER version + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = { + &PKG_VERSION[0], // Package version 0:ESP32C3 + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[] = { + &BLOCK1_VERSION[0], // BLOCK1 efuse version + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = { + &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID + NULL +}; + const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[] = { - &BLOCK2_VERSION[0], // Version of Block2 + &BLOCK2_VERSION[0], // Version of BLOCK2 NULL }; diff --git a/components/efuse/esp32c3/esp_efuse_table.csv b/components/efuse/esp32c3/esp_efuse_table.csv index 0d9076c6b9..0561b66bf8 100644 --- a/components/efuse/esp32c3/esp_efuse_table.csv +++ b/components/efuse/esp32c3/esp_efuse_table.csv @@ -125,10 +125,14 @@ SPI_PAD_CONFIG_D5, EFUSE_BLK1, 96, 6, SPI_PAD_configure D5 SPI_PAD_CONFIG_D6, EFUSE_BLK1, 102, 6, SPI_PAD_configure D6 SPI_PAD_CONFIG_D7, EFUSE_BLK1, 108, 6, SPI_PAD_configure D7 + WAFER_VERSION, EFUSE_BLK1, 114, 3, WAFER version + PKG_VERSION, EFUSE_BLK1, 117, 3, Package version 0:ESP32C3 + BLOCK1_VERSION, EFUSE_BLK1, 120, 3, BLOCK1 efuse version -# SYS_DATA_PART1 # +# SYS_DATA_PART1 BLOCK# - System configuration ####################### - BLOCK2_VERSION, EFUSE_BLK2, 128, 3, Version of Block2 + OPTIONAL_UNIQUE_ID, EFUSE_BLK2, 0, 128, Optional unique 128-bit ID + BLOCK2_VERSION, EFUSE_BLK2, 128, 3, Version of BLOCK2 TEMP_CALIB, EFUSE_BLK2, 131, 9, Temperature calibration data OCODE, EFUSE_BLK2, 140, 8, ADC OCode ADC1_INIT_CODE_ATTEN0, EFUSE_BLK2, 148, 10, ADC1 init code at atten0 diff --git a/components/efuse/esp32c3/include/esp_efuse_table.h b/components/efuse/esp32c3/include/esp_efuse_table.h index 7d74200a59..e09d3e517a 100644 --- a/components/efuse/esp32c3/include/esp_efuse_table.h +++ b/components/efuse/esp32c3/include/esp_efuse_table.h @@ -17,7 +17,7 @@ extern "C" { #endif -// md5_digest_table 96cd6235ddc0947b4a296add3f942acb +// md5_digest_table 69693bb96832f42833460571ebc1f865 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -115,6 +115,10 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[]; +extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION[]; +extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[]; +extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK1_VERSION[]; +extern const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[]; extern const esp_efuse_desc_t* ESP_EFUSE_BLOCK2_VERSION[]; extern const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[]; extern const esp_efuse_desc_t* ESP_EFUSE_OCODE[]; diff --git a/components/efuse/src/esp32c3/esp_efuse_fields.c b/components/efuse/src/esp32c3/esp_efuse_fields.c index f95daa651f..7d41bf84d6 100644 --- a/components/efuse/src/esp32c3/esp_efuse_fields.c +++ b/components/efuse/src/esp32c3/esp_efuse_fields.c @@ -33,7 +33,7 @@ const static char *TAG = "efuse"; uint8_t esp_efuse_get_chip_ver(void) { uint32_t chip_ver = 0; - // ESP32C3 does not have this field + esp_efuse_read_field_blob(ESP_EFUSE_WAFER_VERSION, &chip_ver, ESP_EFUSE_WAFER_VERSION[0]->bit_count); return chip_ver; } @@ -41,7 +41,7 @@ uint8_t esp_efuse_get_chip_ver(void) uint32_t esp_efuse_get_pkg_ver(void) { uint32_t pkg_ver = 0; - // ESP32C3 does not have this field + esp_efuse_read_field_blob(ESP_EFUSE_PKG_VERSION, &pkg_ver, ESP_EFUSE_PKG_VERSION[0]->bit_count); return pkg_ver; } diff --git a/components/esp32c3/system_api_esp32c3.c b/components/esp32c3/system_api_esp32c3.c index 703a68e5b0..740769cfad 100644 --- a/components/esp32c3/system_api_esp32c3.c +++ b/components/esp32c3/system_api_esp32c3.c @@ -17,6 +17,7 @@ #include "esp_system.h" #include "esp_private/system_internal.h" #include "esp_attr.h" +#include "esp_efuse.h" #include "esp_log.h" #include "esp32c3/rom/cache.h" #include "esp32c3/cache_err_int.h" @@ -142,6 +143,7 @@ void esp_chip_info(esp_chip_info_t *out_info) { memset(out_info, 0, sizeof(*out_info)); out_info->model = CHIP_ESP32C3; + out_info->revision = esp_efuse_get_chip_ver(); out_info->cores = 1; out_info->features = CHIP_FEATURE_WIFI_BGN | CHIP_FEATURE_BLE; } diff --git a/components/esptool_py/esptool b/components/esptool_py/esptool index 692a0fce38..fc17800906 160000 --- a/components/esptool_py/esptool +++ b/components/esptool_py/esptool @@ -1 +1 @@ -Subproject commit 692a0fce388744a071503216ae3f8a2907e9c608 +Subproject commit fc1780090683a3bd7d336d3250826f85362964b4 diff --git a/components/soc/esp32c3/include/soc/efuse_reg.h b/components/soc/esp32c3/include/soc/efuse_reg.h index cabb2428a4..c4f3aec2bf 100644 --- a/components/soc/esp32c3/include/soc/efuse_reg.h +++ b/components/soc/esp32c3/include/soc/efuse_reg.h @@ -760,12 +760,24 @@ extern "C" { #define EFUSE_SPI_PAD_CONF_1_S 0 #define EFUSE_RD_MAC_SPI_SYS_3_REG (DR_REG_EFUSE_BASE + 0x050) -/* EFUSE_SYS_DATA_PART0_0 : RO ;bitpos:[31:18] ;default: 14'h0 ; */ -/*description: Stores the fist 14 bits of the zeroth part of system data.*/ -#define EFUSE_SYS_DATA_PART0_0 0x00003FFF +/* EFUSE_SYS_DATA_PART0_0 : RO ;bitpos:[31:24] ;default: 8'h0 ; */ +/*description: Stores the fist 8 bits of the zeroth part of system data.*/ +#define EFUSE_SYS_DATA_PART0_0 0x000000FF #define EFUSE_SYS_DATA_PART0_0_M ((EFUSE_SYS_DATA_PART0_0_V)<<(EFUSE_SYS_DATA_PART0_0_S)) -#define EFUSE_SYS_DATA_PART0_0_V 0x3FFF -#define EFUSE_SYS_DATA_PART0_0_S 18 +#define EFUSE_SYS_DATA_PART0_0_V 0xFF +#define EFUSE_SYS_DATA_PART0_0_S 25 +/* EFUSE_PKG_VERSION : RO ;bitpos:[23:21] ;default: 3'h0 ; */ +/*description: Package version 0:ESP32-C3 */ +#define EFUSE_PKG_VERSION 0x00000007 +#define EFUSE_PKG_VERSION_M ((EFUSE_PKG_VERSION_V)<<(EFUSE_PKG_VERSION_S)) +#define EFUSE_PKG_VERSION_V 0x7 +#define EFUSE_PKG_VERSION_S 21 +/* EFUSE_WAFER_VERSION : RO ;bitpos:[20:18] ;default: 3'h0 ; */ +/*description: WAFER version 0:A */ +#define EFUSE_WAFER_VERSION 0x00000007 +#define EFUSE_WAFER_VERSION_M ((EFUSE_WAFER_VERSION_V)<<(EFUSE_WAFER_VERSION_S)) +#define EFUSE_WAFER_VERSION_V 0x7 +#define EFUSE_WAFER_VERSION_S 18 /* EFUSE_SPI_PAD_CONF_2 : RO ;bitpos:[17:0] ;default: 18'h0 ; */ /*description: Stores the second part of SPI_PAD_CONF.*/ #define EFUSE_SPI_PAD_CONF_2 0x0003FFFF