espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-04 21:24:32 +02:00
Code Issues Packages Projects Releases Wiki Activity

mspi: update 80MHz DTR tuning algorithm and Oct PSRAM 80M DTR tuning parameters

Browse Source
This commit is contained in:
Armando
2021-08-02 17:15:51 +08:00
parent 0f91a01a46
commit 038b7b1fa9
2 changed files with 22 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
components/spi_flash/esp32s3/mspi_timing_tuning_configs.h
View File

@@ -36,6 +36,6 @@
#define MSPI_TIMING_PSRAM_DEFAULT_CONFIG_ID_CORE_CLK_80M_MODULE_CLK_40M_DTR_MODE 4 #define MSPI_TIMING_PSRAM_DEFAULT_CONFIG_ID_CORE_CLK_80M_MODULE_CLK_40M_DTR_MODE 4
//Octal PSRAM: core clock 160M, module clock 80M, DTR mode //Octal PSRAM: core clock 160M, module clock 80M, DTR mode
#define MSPI_TIMING_PSRAM_CONFIG_TABLE_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE {{1, 0, 0}, {0, 0, 0}, {3, 0, 1}, {1, 0, 1}, {0, 0, 1}, {3, 0, 2}, {1, 0, 2}, {0, 0, 2}, {3, 0, 3}, {1, 0, 3}, {0, 0, 3}, {3, 0, 4}, {1, 0, 4}, {0, 0, 4}} #define MSPI_TIMING_PSRAM_CONFIG_TABLE_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE {{0, 0, 0}, {4, 2, 2}, {2, 1, 2}, {4, 1, 2}, {1, 0, 1}, {4, 0, 2}, {0, 0, 1}, {4, 2, 3}, {2, 1, 3}, {4, 1, 3}, {1, 0, 2}, {4, 0, 3}, {0, 0, 2}, {4, 2, 4}}
#define MSPI_TIMING_PSRAM_CONFIG_NUM_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE 14 #define MSPI_TIMING_PSRAM_CONFIG_NUM_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE 14
#define MSPI_TIMING_PSRAM_DEFAULT_CONFIG_ID_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE 1 #define MSPI_TIMING_PSRAM_DEFAULT_CONFIG_ID_CORE_CLK_160M_MODULE_CLK_80M_DTR_MODE 1

24
components/spi_flash/spi_flash_timing_tuning.c
View File

@@ -180,11 +180,25 @@ static void find_max_consecutive_success_points(uint8_t *array, uint32_t size, u
static void select_best_tuning_config(spi_timing_config_t *config, uint32_t consecutive_length, uint32_t end, bool is_flash) static void select_best_tuning_config(spi_timing_config_t *config, uint32_t consecutive_length, uint32_t end, bool is_flash)
{ {
#if (SPI_TIMING_FLASH_DTR_MODE && CONFIG_ESPTOOLPY_FLASHFREQ_80M) || (SPI_TIMING_PSRAM_DTR_MODE && CONFIG_SPIRAM_SPEED_80M)
//80M DTR best point scheme
uint32_t best_point; uint32_t best_point;
if (length >= 3) { /**
best_point = end - length / 2; * If the consecutive success point list is no longer than 2, or all available points are successful,
} else { * tuning is FAIL, select default point, and generate a warning
*/
//Define these magic number in macros in `spi_timing_config.h`. TODO: IDF-3146
if (consecutive_length <= 2 || consecutive_length >= 6) {
best_point = config->default_config_id; best_point = config->default_config_id;
ESP_EARLY_LOGW("timing tuning:", "tuning fail, best point is %d\n", best_point + 1);
} else if (consecutive_length <= 4) {
//consevutive length : 3 or 4
best_point = end - 1;
ESP_EARLY_LOGD("timing tuning:","tuning success, best point is %d\n", best_point + 1);
} else {
//consecutive point list length equals 5
best_point = end - 2;
ESP_EARLY_LOGD("timing tuning:","tuning success, best point is %d\n", best_point + 1);
} }
if (is_flash) { if (is_flash) {
@@ -192,6 +206,10 @@ static void select_best_tuning_config(spi_timing_config_t *config, uint32_t cons
} else { } else {
s_psram_best_timing_tuning_config = config->tuning_config_table[best_point]; s_psram_best_timing_tuning_config = config->tuning_config_table[best_point];
} }
#else
//won't reach here
abort();
#endif
} }
static void do_tuning(uint8_t *reference_data, spi_timing_config_t *timing_config, bool is_flash) static void do_tuning(uint8_t *reference_data, spi_timing_config_t *timing_config, bool is_flash)