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https://github.com/espressif/esp-idf.git
synced 2026-05-04 11:55:21 +02:00
Merge branch 'master' into feature/esp32s2beta_update
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@@ -947,7 +947,11 @@ static void uart_rx_intr_handler_default(void *param)
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if (p_uart->rx_buffer_full_flg == false) {
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//We have to read out all data in RX FIFO to clear the interrupt signal
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for(buf_idx = 0; buf_idx < rx_fifo_len; buf_idx++) {
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p_uart->rx_data_buf[buf_idx] = uart_reg->fifo.rw_byte;
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#if CONFIG_IDF_TARGET_ESP32
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p_uart->rx_data_buf[buf_idx++] = uart_reg->fifo.rw_byte;
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#elif CONFIG_IDF_TARGET_ESP32S2BETA
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p_uart->rx_data_buf[buf_idx++] = READ_PERI_REG(UART_FIFO_AHB_REG(uart_num));
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#endif
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}
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uint8_t pat_chr = uart_reg->at_cmd_char.data;
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int pat_num = uart_reg->at_cmd_char.char_num;
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@@ -1123,7 +1127,11 @@ esp_err_t uart_wait_tx_done(uart_port_t uart_num, TickType_t ticks_to_wait)
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xSemaphoreTake(p_uart_obj[uart_num]->tx_done_sem, 0);
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typeof(UART0.status) status = UART[uart_num]->status;
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//Wait txfifo_cnt = 0, and the transmitter state machine is in idle state.
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if(status.txfifo_cnt == 0 && status.st_utx_out == 0) {
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#ifdef CONFIG_IDF_TARGET_ESP32
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if (status.txfifo_cnt == 0 && status.st_utx_out == 0) {
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#else /* TODO: check transmitter state machine on ESP32S2Beta */
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if (status.txfifo_cnt == 0) {
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#endif
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xSemaphoreGive(p_uart_obj[uart_num]->tx_mux);
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return ESP_OK;
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}
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@@ -1558,7 +1566,7 @@ void uart_set_select_notif_callback(uart_port_t uart_num, uart_select_notif_call
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}
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}
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portMUX_TYPE *uart_get_selectlock()
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portMUX_TYPE *uart_get_selectlock(void)
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{
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return &uart_selectlock;
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}
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