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https://github.com/espressif/esp-idf.git
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Merge branch 'fix/freertos_scheduler_suspension_test_v4.4' into 'release/v4.4'
fix(freertos): Fixed a failing scheduler suspension unit test (v4.4) See merge request espressif/esp-idf!28042
This commit is contained in:
@@ -4,12 +4,10 @@
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#include "freertos/FreeRTOS.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "unity.h"
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#include "unity.h"
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#include "soc/cpu.h"
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#include "soc/cpu.h"
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#include "test_utils.h"
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#include "test_utils.h"
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#include "driver/timer.h"
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#include "sdkconfig.h"
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#include "sdkconfig.h"
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#include "esp_rom_sys.h"
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#include "esp_rom_sys.h"
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@@ -21,21 +19,6 @@
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#endif
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#endif
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static SemaphoreHandle_t isr_semaphore;
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static SemaphoreHandle_t isr_semaphore;
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static volatile unsigned isr_count;
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/* Timer ISR increments an ISR counter, and signals a
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mutex semaphore to wake up another counter task */
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static void timer_group0_isr(void *vp_arg)
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{
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timer_group_clr_intr_status_in_isr(TIMER_GROUP_0, TIMER_0);
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timer_group_enable_alarm_in_isr(TIMER_GROUP_0, TIMER_0);
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portBASE_TYPE higher_awoken = pdFALSE;
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isr_count++;
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xSemaphoreGiveFromISR(isr_semaphore, &higher_awoken);
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if (higher_awoken == pdTRUE) {
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portYIELD_FROM_ISR();
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}
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}
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typedef struct {
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typedef struct {
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SemaphoreHandle_t trigger_sem;
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SemaphoreHandle_t trigger_sem;
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@@ -52,17 +35,14 @@ static void counter_task_fn(void *vp_config)
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}
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}
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}
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}
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/* This test verifies that an interrupt can wake up a task while the scheduler is disabled.
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/* This test verifies that an interrupt can wake up a task while the scheduler is disabled.
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In the FreeRTOS implementation, this exercises the xPendingReadyList for that core.
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In the FreeRTOS implementation, this exercises the xPendingReadyList for that core.
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*/
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*/
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TEST_CASE("Scheduler disabled can handle a pending context switch on resume", "[freertos]")
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TEST_CASE("Scheduler disabled can handle a pending context switch on resume", "[freertos]")
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{
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{
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isr_count = 0;
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isr_semaphore = xSemaphoreCreateBinary();
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isr_semaphore = xSemaphoreCreateBinary();
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TaskHandle_t counter_task;
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TaskHandle_t counter_task;
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intr_handle_t isr_handle = NULL;
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counter_config_t count_config = {
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counter_config_t count_config = {
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.trigger_sem = isr_semaphore,
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.trigger_sem = isr_semaphore,
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@@ -72,59 +52,51 @@ TEST_CASE("Scheduler disabled can handle a pending context switch on resume", "[
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&count_config, UNITY_FREERTOS_PRIORITY + 1,
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&count_config, UNITY_FREERTOS_PRIORITY + 1,
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&counter_task, UNITY_FREERTOS_CPU);
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&counter_task, UNITY_FREERTOS_CPU);
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/* Configure timer ISR */
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// Allow the counter task to spin up
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const timer_config_t timer_config = {
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.alarm_en = 1,
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.auto_reload = 1,
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.counter_dir = TIMER_COUNT_UP,
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.divider = 2, //Range is 2 to 65536
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.intr_type = TIMER_INTR_LEVEL,
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.counter_en = TIMER_PAUSE,
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};
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/* Configure timer */
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timer_init(TIMER_GROUP_0, TIMER_0, &timer_config);
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timer_pause(TIMER_GROUP_0, TIMER_0);
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timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0);
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timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, 1000);
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timer_enable_intr(TIMER_GROUP_0, TIMER_0);
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timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_group0_isr, NULL, 0, &isr_handle);
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timer_start(TIMER_GROUP_0, TIMER_0);
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vTaskDelay(5);
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vTaskDelay(5);
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// Check some counts have been triggered via the ISR
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// Unblock the counter task and verify that it runs normally when the scheduler is running
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TEST_ASSERT(count_config.counter > 10);
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xSemaphoreGive(isr_semaphore);
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TEST_ASSERT(isr_count > 10);
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vTaskDelay(5);
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for (int i = 0; i < 20; i++) {
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TEST_ASSERT(count_config.counter == 1);
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vTaskSuspendAll();
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esp_intr_noniram_disable();
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unsigned no_sched_task = count_config.counter;
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// Suspend the scheduler on this core
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vTaskSuspendAll();
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TEST_ASSERT_EQUAL(taskSCHEDULER_SUSPENDED, xTaskGetSchedulerState());
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// scheduler off on this CPU...
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unsigned no_sched_task = count_config.counter;
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esp_rom_delay_us(20 * 1000);
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//TEST_ASSERT_NOT_EQUAL(no_sched_isr, isr_count);
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// We simulate unblocking of the counter task from an ISR by
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TEST_ASSERT_EQUAL(count_config.counter, no_sched_task);
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// giving the isr_semaphore via the FromISR() API while the
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// scheduler is suspended. This prompts the kernel to put the
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// disable timer interrupts
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// unblocked task on the xPendingReadyList.
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timer_disable_intr(TIMER_GROUP_0, TIMER_0);
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portBASE_TYPE yield = pdFALSE;
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xSemaphoreGiveFromISR(isr_semaphore, &yield);
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// When we resume scheduler, we expect the counter task
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if (yield == pdTRUE) {
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// will preempt and count at least one more item
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portYIELD_FROM_ISR();
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esp_intr_noniram_enable();
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timer_enable_intr(TIMER_GROUP_0, TIMER_0);
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xTaskResumeAll();
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TEST_ASSERT_NOT_EQUAL(count_config.counter, no_sched_task);
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}
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}
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esp_intr_free(isr_handle);
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// scheduler off on this CPU...
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timer_disable_intr(TIMER_GROUP_0, TIMER_0);
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esp_rom_delay_us(20 * 1000);
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// Verify that the counter task is not scheduled when the scheduler is supended
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TEST_ASSERT_EQUAL(count_config.counter, no_sched_task);
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// When we resume scheduler, we expect the counter task
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// will preempt and count at least one more item
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xTaskResumeAll();
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TEST_ASSERT_EQUAL(taskSCHEDULER_RUNNING, xTaskGetSchedulerState());
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// Verify that the counter task has run after the scheduler is resumed
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TEST_ASSERT_NOT_EQUAL(count_config.counter, no_sched_task);
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// Clean up
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vTaskDelete(counter_task);
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vTaskDelete(counter_task);
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vSemaphoreDelete(isr_semaphore);
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vSemaphoreDelete(isr_semaphore);
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// Give the idle task a chance to cleanup any remaining deleted tasks
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vTaskDelay(10);
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}
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}
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/* Multiple tasks on different cores can be added to the pending ready list
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/* Multiple tasks on different cores can be added to the pending ready list
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