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Merge branch 'feature/esp32c6_wifi_bt_common_dependcy_support' into 'master'

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esp32c6: support esp32c6 phy

Closes IDF-5680

See merge request espressif/esp-idf!21576
This commit is contained in:
Jiang Jiang Jian
2022-12-19 12:16:11 +08:00
parent 92a4a146a0 8f78520342
commit 066dc196af
20 changed files with 224 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
components/esp_phy/CMakeLists.txt
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@@ -1,7 +1,6 @@
idf_build_get_property(idf_target IDF_TARGET)
if(IDF_TARGET STREQUAL "esp32c6" OR IDF_TARGET STREQUAL "esp32h2")
# TODO : IDF-5680
if(IDF_TARGET STREQUAL "esp32h2")
# TODO : IDF-6337
return()
endif()
@@ -68,15 +67,10 @@ if(link_binary_libs)
target_link_libraries(${COMPONENT_LIB} PUBLIC rtc)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a librtc.a
$<TARGET_FILE:${esp_phy_lib}>)
endif()
if(CONFIG_IDF_TARGET_ESP32S2)
elseif(CONFIG_IDF_TARGET_ESP32S2)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a
$<TARGET_FILE:${esp_phy_lib}>)
endif()
if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3
OR CONFIG_IDF_TARGET_ESP32H4 OR CONFIG_IDF_TARGET_ESP32C2)
elseif(CONFIG_SOC_BT_SUPPORTED OR CONFIG_SOC_IEEE802154_SUPPORTED)
target_link_libraries(${COMPONENT_LIB} PUBLIC btbb)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a
$<TARGET_FILE:${esp_phy_lib}>)

184
components/esp_phy/esp32c6/include/phy_init_data.h Normal file
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@@ -0,0 +1,184 @@
/*
* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 2
#define PHY_TX_POWER_NUM 14
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
* @brief Structure containing default recommended PHY initialization parameters.
*/
static const esp_phy_init_data_t phy_init_data= { {
0x01,
0x00,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
0x00,
0x00,
0x00,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0x9B
} };
static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
* @brief PHY init data control infomation structure
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
* @brief Country corresponds to PHY init data type structure
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */

BIN
components/esp_phy/esp32c6/phy_multiple_init_data.bin Normal file
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Binary file not shown.

2
components/esp_phy/lib

Submodule components/esp_phy/lib updated: 3daf842446...979b0530b1

16
components/esp_phy/src/phy_init.c
View File

@@ -31,8 +31,12 @@
#include "esp_rom_crc.h"
#include "esp_rom_sys.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/rtc_periph.h"
#if __has_include("soc/syscon_reg.h")
#include "soc/syscon_reg.h"
#endif
#if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#endif
@@ -46,7 +50,7 @@ static const char* TAG = "phy_init";
static _lock_t s_phy_access_lock;
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
static DRAM_ATTR struct {
int count; /* power on count of wifi and bt power domain */
_lock_t lock;
@@ -200,12 +204,16 @@ static inline void phy_update_wifi_mac_time(bool en_clock_stopped, int64_t now)
IRAM_ATTR void esp_phy_common_clock_enable(void)
{
#if !CONFIG_IDF_TARGET_ESP32C6 // IDF-5679
wifi_bt_common_module_enable();
#endif
}
IRAM_ATTR void esp_phy_common_clock_disable(void)
{
#if !CONFIG_IDF_TARGET_ESP32C6 // IDF-5679
wifi_bt_common_module_disable();
#endif
}
static inline void phy_digital_regs_store(void)
@@ -280,7 +288,7 @@ void esp_phy_disable(void)
void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
{
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
_lock_acquire(&s_wifi_bt_pd_controller.lock);
if (s_wifi_bt_pd_controller.count++ == 0) {
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
@@ -296,7 +304,7 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
void esp_wifi_bt_power_domain_off(void)
{
#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
_lock_acquire(&s_wifi_bt_pd_controller.lock);
if (--s_wifi_bt_pd_controller.count == 0) {
SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);

1
components/esp_system/port/soc/esp32c6/system_internal.c
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@@ -66,7 +66,6 @@ void IRAM_ATTR esp_restart_noos(void)
// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
// Moved to module internal
// SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG,
// SYSTEM_WIFIBB_RST | SYSTEM_FE_RST | // TODO: IDF-5680 (esp_phy)
// SYSTEM_WIFIMAC_RST | // TODO: IDF-5679 (esp_wifi)
// SYSTEM_SDIO_RST | // SDIO_HINF_HINF_SDIO_RST?
// SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | // TODO: IDF-5325 (ethernet)

4
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
View File

@@ -551,10 +551,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
config SOC_MAC_BB_PD_MEM_SIZE
int
default 192
config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12

1
components/soc/esp32c2/include/soc/soc_caps.h
View File

@@ -269,7 +269,6 @@
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
/*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/
#define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH (12)

8
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -31,6 +31,10 @@ config SOC_BT_SUPPORTED
bool
default y
config SOC_IEEE802154_SUPPORTED
bool
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
default y
@@ -855,10 +859,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
config SOC_MAC_BB_PD_MEM_SIZE
int
default 192
config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12

3
components/soc/esp32c6/include/soc/soc_caps.h
View File

@@ -33,6 +33,7 @@
#define SOC_TWAI_SUPPORTED 1
#define SOC_ETM_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_IEEE802154_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1
@@ -409,10 +410,8 @@
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)
// TODO: IDF-5680 (Copy from esp32c3, need check)
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
// TODO: IDF-5679 (Copy from esp32c3, need check)
/*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/

8
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
View File

@@ -3,6 +3,10 @@
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config SOC_IEEE802154_SUPPORTED
bool
default y
config SOC_EFUSE_KEY_PURPOSE_FIELD
bool
default y
@@ -723,10 +727,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
config SOC_MAC_BB_PD_MEM_SIZE
int
default 192
config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12

4
components/soc/esp32h2/include/soc/soc_caps.h
View File

@@ -32,6 +32,7 @@
// #define SOC_MCPWM_SUPPORTED 1 // TODO: IDF-6237
// #define SOC_TWAI_SUPPORTED 1 // TODO: IDF-6217
// #define SOC_BT_SUPPORTED 1 // TODO: IDF-6416
#define SOC_IEEE802154_SUPPORTED 1
// #define SOC_ASYNC_MEMCPY_SUPPORTED 1 // TODO: IDF-6238
// #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 // TODO: IDF-6239
// #define SOC_TEMP_SENSOR_SUPPORTED 1 // TODO: IDF-6229
@@ -398,10 +399,9 @@
/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
#define SOC_COEX_HW_PTI (1)
// TODO: IDF-5680 (Copy from esp32c6, need check)
// TODO: IDF-6337
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
// TODO: IDF-5679 (Copy from esp32c6, need check)
/*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/

8
components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
View File

@@ -23,6 +23,10 @@ config SOC_BT_SUPPORTED
bool
default y
config SOC_IEEE802154_SUPPORTED
bool
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
default y
@@ -751,10 +755,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
config SOC_MAC_BB_PD_MEM_SIZE
int
default 192
config SOC_PM_SUPPORT_BT_WAKEUP
bool
default y

2
components/soc/esp32h4/include/soc/soc_caps.h
View File

@@ -38,6 +38,7 @@
#define SOC_GDMA_SUPPORTED 1
#define SOC_TWAI_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
#define SOC_IEEE802154_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_SUPPORTS_SECURE_DL_MODE 1
@@ -359,7 +360,6 @@
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
/*-------------------------- Power Management CAPS ----------------------------*/

5
docs/conf_common.py
View File

@@ -150,6 +150,8 @@ ESP32C3_DOCS = ['hw-reference/esp32c3/**',
ESP32C2_DOCS = ['api-guides/RF_calibration.rst']
ESP32C6_DOCS = ['api-guides/RF_calibration.rst']
# format: {tag needed to include: documents to included}, tags are parsed from sdkconfig and peripheral_caps.h headers
conditional_include_dict = {'SOC_BT_SUPPORTED':BT_DOCS,
'SOC_BLE_MESH_SUPPORTED':BLE_MESH_DOCS,
@@ -187,7 +189,8 @@ conditional_include_dict = {'SOC_BT_SUPPORTED':BT_DOCS,
'esp32s2':ESP32S2_DOCS,
'esp32s3':ESP32S3_DOCS,
'esp32c2':ESP32C2_DOCS,
'esp32c3':ESP32C3_DOCS}
'esp32c3':ESP32C3_DOCS,
'esp32c6':ESP32C6_DOCS}
extensions += ['sphinx_copybutton',
'sphinxcontrib.wavedrom',

1
docs/docs_not_updated/esp32c6.txt
View File

@@ -32,7 +32,6 @@ api-guides/tools/idf-docker-image
api-guides/tools/index
api-guides/startup
api-guides/hlinterrupts
api-guides/RF_calibration
api-guides/unit-tests
api-guides/deep-sleep-stub
api-guides/blufi

2
docs/en/api-guides/index.rst
View File

@@ -34,7 +34,7 @@ API Guides
partition-tables
performance/index
reproducible-builds
:not esp32c6: RF_calibration
RF_calibration
../security/security
:esp32: ../security/secure-boot-v1
../security/secure-boot-v2

2
docs/en/api-guides/partition-tables.rst
View File

@@ -89,7 +89,7 @@ The ESP-IDF bootloader ignores any partition types other than ``app`` (0x00) and
SubType
~~~~~~~
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32c6 = "(not updated yet)"}
{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`"}
The 8-bit SubType field is specific to a given partition type. ESP-IDF currently only specifies the meaning of the subtype field for ``app`` and ``data`` partition types.

2
docs/zh_CN/api-guides/index.rst
View File

@@ -30,7 +30,7 @@ API 指南
openthread
partition-tables
performance/index
:not esp32c6: RF_calibration
RF_calibration
../security/security
:esp32: ../security/secure-boot-v1
../security/secure-boot-v2

1
tools/ci/check_public_headers_exceptions.txt
View File

@@ -36,6 +36,7 @@ components/esp_phy/esp32s2/include/phy_init_data.h
components/esp_phy/esp32s3/include/phy_init_data.h
components/esp_phy/esp32c3/include/phy_init_data.h
components/esp_phy/esp32c2/include/phy_init_data.h
components/esp_phy/esp32c6/include/phy_init_data.h
components/spi_flash/include/spi_flash_chip_issi.h
components/spi_flash/include/spi_flash_chip_mxic.h