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refactor(system): removed esp_system from astyle ignore list and reformated it

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This commit is contained in:
Marius Vikhammer
2024-01-30 09:40:10 +08:00
parent da1d587667
commit 06850e0e1e
88 changed files with 734 additions and 808 deletions
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17
components/esp_system/crosscore_int.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -25,7 +25,6 @@
#define REASON_GDB_CALL BIT(3)
#define REASON_TWDT_ABORT BIT(4)
static portMUX_TYPE reason_spinlock = portMUX_INITIALIZER_UNLOCKED;
static volatile uint32_t reason[portNUM_PROCESSORS];
@@ -38,7 +37,8 @@ static inline void IRAM_ATTR esp_crosscore_isr_handle_yield(void)
portYIELD_FROM_ISR();
}
static void IRAM_ATTR esp_crosscore_isr(void *arg) {
static void IRAM_ATTR esp_crosscore_isr(void *arg)
{
uint32_t my_reason_val;
//A pointer to the correct reason array item is passed to this ISR.
volatile uint32_t *my_reason = arg;
@@ -72,8 +72,6 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
esp_backtrace_print(100);
}
#if CONFIG_ESP_TASK_WDT_EN
if (my_reason_val & REASON_TWDT_ABORT) {
extern void task_wdt_timeout_abort(bool);
@@ -87,7 +85,8 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
//Initialize the crosscore interrupt on this core. Call this once
//on each active core.
void esp_crosscore_int_init(void) {
void esp_crosscore_int_init(void)
{
portENTER_CRITICAL(&reason_spinlock);
reason[esp_cpu_get_core_id()] = 0;
portEXIT_CRITICAL(&reason_spinlock);
@@ -104,7 +103,8 @@ void esp_crosscore_int_init(void) {
ESP_ERROR_CHECK(err);
}
static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) {
static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask)
{
assert(core_id < portNUM_PROCESSORS);
//Mark the reason we interrupt the other CPU
portENTER_CRITICAL_ISR(&reason_spinlock);
@@ -135,7 +135,8 @@ void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id)
}
#if CONFIG_ESP_TASK_WDT_EN
void IRAM_ATTR esp_crosscore_int_send_twdt_abort(int core_id) {
void IRAM_ATTR esp_crosscore_int_send_twdt_abort(int core_id)
{
esp_crosscore_int_send(core_id, REASON_TWDT_ABORT);
}
#endif // CONFIG_ESP_TASK_WDT_EN

47
components/esp_system/eh_frame_parser.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -200,7 +200,6 @@ typedef struct {
#define ESP_EH_FRAME_GET_CFA_REG(value) ((value) & 0xff)
#define ESP_EH_FRAME_GET_CFA_OFF(value) ((value) >> 8)
/**
* @brief Unsupported opcode value to return when exeucting 0-opcode type instructions.
*/
@@ -250,7 +249,6 @@ typedef struct {
#define DW_LEB128_SIGN_BIT(byte) (((byte) >> 6) & 1)
#define DW_LEB128_MAX_SHIFT (31)
/**
* @brief Symbols defined by the linker.
* Retrieve the addresses of both .eh_frame_hdr and .eh_frame sections.
@@ -278,9 +276,10 @@ static uint32_t decode_leb128(const uint8_t* bytes, bool is_signed, uint32_t* le
byte = bytes[size++];
res |= (byte & 0x7f) << shf;
shf += 7;
if (DW_LEB128_HIGHEST_BIT(byte) == 0)
if (DW_LEB128_HIGHEST_BIT(byte) == 0) {
break;
}
}
if (is_signed && shf <= DW_LEB128_MAX_SHIFT && DW_LEB128_SIGN_BIT(byte)) {
res |= ((uint32_t) ~0 << shf);
@@ -435,23 +434,25 @@ static const table_entry* esp_eh_frame_find_entry(const table_entry* sorted_tabl
/* Signed comparisons. */
const int32_t sfun_addr = (int32_t) fun_addr;
const int32_t snxt_addr = (int32_t) nxt_addr;
if (sfun_addr <= ra && snxt_addr > ra)
if (sfun_addr <= ra && snxt_addr > ra) {
found = true;
else if (snxt_addr <= ra)
} else if (snxt_addr <= ra) {
begin = middle + 1;
else
} else {
end = middle;
}
} else {
/* Unsigned comparisons. */
const uint32_t ura = (uint32_t) ra;
if (fun_addr <= ura && nxt_addr > ura)
if (fun_addr <= ura && nxt_addr > ura) {
found = true;
else if (nxt_addr <= ura)
} else if (nxt_addr <= ura) {
begin = middle + 1;
else
} else {
end = middle;
}
}
middle = (end + begin) / 2;
}
@@ -476,12 +477,13 @@ static inline uint32_t* esp_eh_frame_decode_address(const uint32_t* addr,
{
uint32_t* decoded = 0;
if (ESP_ENCODING_FRAME_HDR_REL(encoding))
if (ESP_ENCODING_FRAME_HDR_REL(encoding)) {
decoded = (uint32_t*)(*addr + (uint32_t) EH_FRAME_HDR_ADDR);
else if (ESP_ENCODING_PC_REL(encoding))
} else if (ESP_ENCODING_PC_REL(encoding)) {
decoded = (uint32_t*)(*addr + (uint32_t) addr);
else
} else {
decoded = (uint32_t*)(*addr);
}
return decoded;
}
@@ -577,7 +579,6 @@ static inline uint32_t esp_eh_frame_execute_opcode_0(const uint32_t opcode, cons
return used_operands;
}
/**
* @brief Execute DWARF instructions.
*
@@ -637,9 +638,10 @@ static bool esp_eh_frame_execute(const uint8_t* instructions, const uint32_t ins
/* As the state->location can also be modified by 0-opcode instructions (in the function)
* and also because we need to break the loop (and not only the switch), let's put this
* check here, after the execution of the instruction, outside of the switch block. */
if (state->location >= EXECUTION_FRAME_PC(*frame))
if (state->location >= EXECUTION_FRAME_PC(*frame)) {
break;
}
}
/* Everything went fine, no unsupported opcode was met, return true. */
return true;
@@ -817,7 +819,8 @@ static uint32_t esp_eh_frame_restore_caller_state(const uint32_t* fde,
*
* @return true is DWARF information are missing, false else.
*/
static bool esp_eh_frame_missing_info(const uint32_t* fde, uint32_t pc) {
static bool esp_eh_frame_missing_info(const uint32_t* fde, uint32_t pc)
{
if (fde == NULL) {
return true;
}
@@ -938,7 +941,8 @@ void esp_eh_frame_print_backtrace(const void *frame_or)
* Check the header libunwind.h for more information
*/
int unw_init_local(unw_cursor_t* c, unw_context_t* ctxt) {
int unw_init_local(unw_cursor_t* c, unw_context_t* ctxt)
{
/* In our implementation, a context and a cursor is the same, so we simply need
* to copy a structure inside another one */
_Static_assert(sizeof(unw_cursor_t) >= sizeof(unw_context_t), "unw_cursor_t size must be greater or equal to unw_context_t's");
@@ -950,7 +954,8 @@ int unw_init_local(unw_cursor_t* c, unw_context_t* ctxt) {
return ret;
}
int unw_step(unw_cursor_t* cp) {
int unw_step(unw_cursor_t* cp)
{
static dwarf_regs state = { 0 };
ExecutionFrame* frame = (ExecutionFrame*) cp;
uint32_t size = 0;
@@ -1020,7 +1025,8 @@ stopunwind:
return 0;
}
int unw_get_reg(unw_cursor_t* cp, unw_regnum_t reg, unw_word_t* valp) {
int unw_get_reg(unw_cursor_t* cp, unw_regnum_t reg, unw_word_t* valp)
{
if (cp == NULL || valp == NULL) {
goto invalid;
}
@@ -1036,7 +1042,8 @@ badreg:
return -UNW_EBADREG;
}
int unw_set_reg(unw_cursor_t* cp, unw_regnum_t reg, unw_word_t val) {
int unw_set_reg(unw_cursor_t* cp, unw_regnum_t reg, unw_word_t val)
{
if (cp == NULL) {
goto invalid;
}

2
components/esp_system/esp_err.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/esp_system.c
View File

@@ -44,7 +44,6 @@ esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler)
return ESP_ERR_INVALID_STATE;
}
void esp_restart(void)
{
for (int i = SHUTDOWN_HANDLERS_NO - 1; i >= 0; i--) {

12
components/esp_system/freertos_hooks.c
View File

@@ -1,10 +1,9 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
@@ -59,7 +58,6 @@ void esp_vApplicationIdleHook(void)
esp_cpu_wait_for_intr();
#endif
}
esp_err_t esp_register_freertos_idle_hook_for_cpu(esp_freertos_idle_cb_t new_idle_cb, UBaseType_t cpuid)
@@ -113,7 +111,9 @@ void esp_deregister_freertos_idle_hook_for_cpu(esp_freertos_idle_cb_t old_idle_c
}
portENTER_CRITICAL(&hooks_spinlock);
for (int n = 0; n < MAX_HOOKS; n++) {
if(idle_cb[cpuid][n] == old_idle_cb) idle_cb[cpuid][n] = NULL;
if (idle_cb[cpuid][n] == old_idle_cb) {
idle_cb[cpuid][n] = NULL;
}
}
portEXIT_CRITICAL(&hooks_spinlock);
}
@@ -134,7 +134,9 @@ void esp_deregister_freertos_tick_hook_for_cpu(esp_freertos_tick_cb_t old_tick_c
}
portENTER_CRITICAL(&hooks_spinlock);
for (int n = 0; n < MAX_HOOKS; n++) {
if(tick_cb[cpuid][n] == old_tick_cb) tick_cb[cpuid][n] = NULL;
if (tick_cb[cpuid][n] == old_tick_cb) {
tick_cb[cpuid][n] = NULL;
}
}
portEXIT_CRITICAL(&hooks_spinlock);
}

1
components/esp_system/hw_stack_guard.c
View File

@@ -47,7 +47,6 @@ ESP_SYSTEM_INIT_FN(esp_hw_stack_guard_init, SECONDARY, ESP_SYSTEM_INIT_ALL_CORES
return ESP_OK;
}
/* The functions below are designed to be used in interrupt/panic handler
* In case using them in user's code put them into critical section */

1
components/esp_system/include/esp_expression_with_stack.h
View File

@@ -49,7 +49,6 @@ void esp_execute_shared_stack_function(SemaphoreHandle_t lock,
size_t stack_size,
shared_stack_function function);
#ifdef __cplusplus
}
#endif

1
components/esp_system/include/esp_ipc.h
View File

@@ -52,7 +52,6 @@ typedef void (*esp_ipc_func_t)(void* arg);
*/
esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
/**
* @brief Execute a callback on a given CPU until and block until it completes
*

2
components/esp_system/include/esp_private/critical_section.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_system/include/esp_private/crosscore_int.h
View File

@@ -23,7 +23,6 @@ extern "C" {
*/
void esp_crosscore_int_init(void);
/**
* Send an interrupt to a CPU indicating it should yield its
* currently running task in favour of a higher-priority task
@@ -36,7 +35,6 @@ void esp_crosscore_int_init(void);
*/
void esp_crosscore_int_send_yield(int core_id);
/**
* Send an interrupt to a CPU indicating it should update its
* CCOMPARE1 value due to a frequency switch.

1
components/esp_system/include/esp_private/eh_frame_parser.h
View File

@@ -24,5 +24,4 @@ void esp_eh_frame_print_backtrace(const void *frame_or);
}
#endif
#endif // EH_FRAME_PARSER_H

1
components/esp_system/include/esp_private/esp_int_wdt.h
View File

@@ -10,7 +10,6 @@
extern "C" {
#endif
/**
* @brief Initialize the non-CPU-specific parts of interrupt watchdog.
*

9
components/esp_system/include/esp_private/esp_task_wdt_impl.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -14,7 +14,6 @@
extern "C" {
#endif
/**
* @brief Allocate and initialize the Task Watchdog Timer (TWDT) with the given configuration.
*
@@ -29,7 +28,6 @@ esp_err_t esp_task_wdt_impl_timer_allocate(const esp_task_wdt_config_t *config,
twdt_isr_callback callback,
twdt_ctx_t *obj);
/**
* @brief Reconfigure a timer.
*
@@ -52,7 +50,6 @@ esp_err_t esp_task_wdt_impl_timer_reconfigure(twdt_ctx_t obj, const esp_task_wdt
*/
void esp_task_wdt_impl_timer_free(twdt_ctx_t obj);
/**
* @brief Feed the Task Watchdog Timer (TWDT)
*
@@ -65,7 +62,6 @@ void esp_task_wdt_impl_timer_free(twdt_ctx_t obj);
*/
esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj);
/**
* @brief Function invoked as soon as the Task Watchdog Timer (TWDT) ISR callback is called.
*
@@ -73,7 +69,6 @@ esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj);
*/
void esp_task_wdt_impl_timeout_triggered(twdt_ctx_t obj);
/**
* @brief Stop the Task Watchdog Timer (TWDT).
*
@@ -82,7 +77,6 @@ void esp_task_wdt_impl_timeout_triggered(twdt_ctx_t obj);
*/
esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj);
/**
* @brief Restart the Task Watchdog Timer (TWDT)
*
@@ -95,7 +89,6 @@ esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj);
*/
esp_err_t esp_task_wdt_impl_timer_restart(twdt_ctx_t obj);
#ifdef __cplusplus
}
#endif

1
components/esp_system/include/esp_private/panic_internal.h
View File

@@ -14,7 +14,6 @@
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif

3
components/esp_system/include/esp_private/startup_internal.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -19,7 +19,6 @@
extern "C" {
#endif
// Port layer defines the entry point. It then transfer control to a `sys_startup_fn_t`, stored in this
// array, one per core.
typedef void (*sys_startup_fn_t)(void);

1
components/esp_system/include/esp_private/usb_console.h
View File

@@ -24,7 +24,6 @@ extern "C" {
* "cdcacm" VFS driver, or by the USB CDC driver in TinyUSB.
*/
/**
* RX/TX callback function type
* @param arg callback-specific context pointer

3
components/esp_system/include/esp_system.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -65,7 +65,6 @@ esp_err_t esp_register_shutdown_handler(shutdown_handler_t handle);
*/
esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handle);
/**
* @brief Restart PRO and APP CPUs.
*

1
components/esp_system/include/esp_task.h
View File

@@ -42,7 +42,6 @@
/* Ping Task */
#define ESP_TASK_PING_STACK (2048 + TASK_EXTRA_STACK_SIZE)
/* idf task */
#define ESP_TASK_TIMER_PRIO (ESP_TASK_PRIO_MAX - 3)
#define ESP_TASK_TIMER_STACK (CONFIG_ESP_TIMER_TASK_STACK_SIZE + TASK_EXTRA_STACK_SIZE)

2
components/esp_system/include/libunwind.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_system/int_wdt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

5
components/esp_system/panic.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -90,7 +90,6 @@ static void panic_print_char_uart(const char c)
}
#endif // CONFIG_ESP_CONSOLE_UART
#if CONFIG_ESP_CONSOLE_USB_CDC
static void panic_print_char_usb_cdc(const char c)
{
@@ -119,7 +118,6 @@ static void panic_print_char_usb_serial_jtag(const char c)
}
#endif //CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG || CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
void panic_print_char(const char c)
{
#if CONFIG_ESP_CONSOLE_UART
@@ -454,7 +452,6 @@ void esp_panic_handler(panic_info_t *info)
#endif /* CONFIG_ESP_SYSTEM_PANIC_GDBSTUB */
}
void IRAM_ATTR __attribute__((noreturn, no_sanitize_undefined)) panic_abort(const char *details)
{
g_panic_abort = true;

2
components/esp_system/port/arch/riscv/debug_helpers.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/port/arch/riscv/debug_stubs.c
View File

@@ -14,7 +14,6 @@
const static char *TAG = "esp_dbg_stubs";
/* Advertises apptrace control block address to host */
static int esp_dbg_stubs_advertise_table(void *stub_table_addr)
{

1
components/esp_system/port/arch/riscv/esp_ipc_isr_port.c
View File

@@ -14,7 +14,6 @@
#include "esp_attr.h"
#include "sdkconfig.h"
void esp_ipc_isr_port_init(const int cpuid)
{
uint32_t intr_source = ETS_FROM_CPU_INTR2_SOURCE + cpuid; // ETS_FROM_CPU_INTR2_SOURCE and ETS_FROM_CPU_INTR3_SOURCE

5
components/esp_system/port/arch/riscv/expression_with_stack.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -41,7 +41,8 @@ static StackType_t *esp_shared_stack_setup_context(StaticTask_t *tcb, void **sp_
return ((StackType_t *)adjusted_top_of_stack);
}
static void esp_shared_stack_restore_context(StaticTask_t *tcb, void *sp_min, void *sp_max) {
static void esp_shared_stack_restore_context(StaticTask_t *tcb, void *sp_min, void *sp_max)
{
tcb->pxDummy6 = sp_min;
tcb->pxDummy8 = sp_max;

4
components/esp_system/port/arch/riscv/panic_arch.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -38,7 +38,6 @@
#include "esp_private/hw_stack_guard.h"
#endif
#define DIM(array) (sizeof(array)/sizeof(*array))
/**
@@ -170,7 +169,6 @@ static void panic_print_register_array(const char* names[], const uint32_t* regs
}
}
void panic_print_registers(const void *f, int core)
{
/**

1
components/esp_system/port/arch/xtensa/esp_ipc_isr_port.c
View File

@@ -15,7 +15,6 @@
#include "esp_attr.h"
#include "sdkconfig.h"
void esp_ipc_isr_port_init(const int cpuid)
{
uint32_t intr_source = ETS_FROM_CPU_INTR2_SOURCE + cpuid; // ETS_FROM_CPU_INTR2_SOURCE and ETS_FROM_CPU_INTR3_SOURCE

3
components/esp_system/port/arch/xtensa/expression_with_stack.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -42,7 +42,6 @@ static void esp_switch_stack_setup(StackType_t *stack, size_t stack_size)
xtensa_shared_stack = top_of_stack;
}
void esp_execute_shared_stack_function(SemaphoreHandle_t lock, void *stack, size_t stack_size, shared_stack_function function)
{
assert(lock);

4
components/esp_system/port/arch/xtensa/panic_arch.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -120,7 +120,6 @@ static void print_illegal_instruction_details(const void *f)
panic_print_hex(*(pepc + 2));
}
static void print_debug_exception_details(const void *f)
{
int debug_rsn;
@@ -360,7 +359,6 @@ static inline void print_cache_err_details(const void *f)
}
#endif
void panic_arch_fill_info(void *f, panic_info_t *info)
{
XtExcFrame *frame = (XtExcFrame *) f;

12
components/esp_system/port/arch/xtensa/trax.c
View File

@@ -1,6 +1,6 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -32,7 +32,9 @@ int trax_enable(trax_ena_select_t which)
#endif
#if CONFIG_IDF_TARGET_ESP32
#ifndef CONFIG_ESP32_TRAX_TWOBANKS
if (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP) return ESP_ERR_NO_MEM;
if (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP) {
return ESP_ERR_NO_MEM;
}
#endif
if (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP) {
trace_ll_set_mode((which == TRAX_ENA_PRO_APP_SWAP) ? TRACEMEM_MUX_PROBLK1_APPBLK0 : TRACEMEM_MUX_PROBLK0_APPBLK1);
@@ -51,16 +53,14 @@ int trax_enable(trax_ena_select_t which)
#elif CONFIG_IDF_TARGET_ESP32S3
if (which == TRAX_ENA_PRO) {
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM);
}
else if (which == TRAX_ENA_APP) {
} else if (which == TRAX_ENA_APP) {
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM);
}
#ifdef CONFIG_ESP32S3_TRAX_TWOBANKS
else if (which == TRAX_ENA_PRO_APP) {
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM);
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK1_NUM);
}
else if (which == TRAX_ENA_PRO_APP_SWAP) {
} else if (which == TRAX_ENA_PRO_APP_SWAP) {
trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM);
trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK1_NUM);
}

4
components/esp_system/port/esp_ipc_isr.c
View File

@@ -34,7 +34,6 @@ static int32_t volatile s_count_of_nested_calls[portNUM_PROCESSORS] = { 0 };
static BaseType_t s_stored_interrupt_level;
static uint32_t volatile esp_ipc_isr_finish_cmd;
/**
* @brief Type of calling
*/
@@ -48,7 +47,6 @@ typedef enum {
static void esp_ipc_isr_call_and_wait(esp_ipc_isr_func_t func, void* arg, esp_ipc_isr_wait_t wait_for);
/* Initializing IPC_ISR */
void esp_ipc_isr_init(void)
@@ -63,7 +61,6 @@ void esp_ipc_isr_init(void)
/* End initializing IPC_ISR */
/* Public API functions */
void IRAM_ATTR esp_ipc_isr_call(esp_ipc_isr_func_t func, void* arg)
@@ -175,7 +172,6 @@ void IRAM_ATTR esp_ipc_isr_stall_resume(void)
/* End public API functions */
/* Private functions*/
static void IRAM_ATTR esp_ipc_isr_call_and_wait(esp_ipc_isr_func_t func, void* arg, esp_ipc_isr_wait_t wait_for)

2
components/esp_system/port/esp_system_linux.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/port/include/esp_clk_internal.h
View File

@@ -27,7 +27,6 @@ extern "C" {
*/
void esp_clk_init(void);
/**
* @brief Disables clock of some peripherals
*

1
components/esp_system/port/include/private/esp_private/brownout.h
View File

@@ -4,7 +4,6 @@
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ESP_BROWNOUT_H
#define __ESP_BROWNOUT_H

3
components/esp_system/port/include/private/esp_private/cache_err_int.h
View File

@@ -12,7 +12,6 @@
extern "C" {
#endif
/**
* @brief initialize cache invalid access interrupt
*
@@ -24,7 +23,6 @@ extern "C" {
*/
void esp_cache_err_int_init(void);
/**
* @brief get the CPU which caused cache invalid access interrupt. Helper function in
* panic handling.
@@ -35,7 +33,6 @@ void esp_cache_err_int_init(void);
*/
int esp_cache_err_get_cpuid(void);
/**
* @brief Returns a pointer to the cache error message
*

4
components/esp_system/port/include/private/esp_private/hw_stack_guard.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -56,7 +56,6 @@ uint32_t esp_hw_stack_guard_get_pc(void);
sw \reg2, 0(\reg1)
.endm
#if SOC_CPU_CORES_NUM > 1
#define ASSIST_DEBUG_CORE_1_INTR_ENA_REG_IMM (ASSIST_DEBUG_CORE_1_INTR_ENA_REG >> 12)
@@ -130,5 +129,4 @@ uint32_t esp_hw_stack_guard_get_pc(void);
#endif // SOC_CPU_CORES_NUM > 1
#endif // __ASSEMBLER__

1
components/esp_system/port/include/private/esp_private/trax.h
View File

@@ -53,7 +53,6 @@ int trax_enable(trax_ena_select_t ena);
*/
int trax_start_trace(trax_downcount_unit_t units_until_stop);
/**
* @brief Trigger a Trax trace stop after the indicated delay. If this is called
* before and the previous delay hasn't ended yet, this will overwrite

6
components/esp_system/port/include/riscv/libunwind-riscv.h
View File

@@ -1,6 +1,6 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -16,7 +16,6 @@
#include "esp_attr.h"
#include "riscv/rvruntime-frames.h"
#ifdef __cplusplus
extern "C" {
#endif
@@ -114,7 +113,8 @@ typedef enum {
/**
* @brief Get the current context
*/
FORCE_INLINE_ATTR void UNW_GET_CONTEXT(ExecutionFrame* frame) {
FORCE_INLINE_ATTR void UNW_GET_CONTEXT(ExecutionFrame* frame)
{
__asm__ __volatile__("sw t0, %1(%0)\n"
"auipc t0, 0\n"
"sw t0, %2(%0)\n"

3
components/esp_system/port/include/x86/libunwind-x86.h
View File

@@ -33,8 +33,7 @@ extern "C" {
* @brief Definition of the x86 DWARF registers set.
* The following registers order has been taken from GCC's `i386.c` file:
*/
typedef struct x86ExcFrame
{
typedef struct x86ExcFrame {
union {
struct {
uint32_t eax;

2
components/esp_system/port/soc/esp32/cache_err_int.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

3
components/esp_system/port/soc/esp32/clk.c
View File

@@ -221,8 +221,7 @@ __attribute__((weak)) void esp_perip_clk_init(void)
common_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG);
hwcrypto_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERI_CLK_EN_REG);
wifi_bt_sdio_clk = ~DPORT_READ_PERI_REG(DPORT_WIFI_CLK_EN_REG);
}
else {
} else {
common_perip_clk = DPORT_WDG_CLK_EN |
DPORT_PCNT_CLK_EN |
DPORT_LEDC_CLK_EN |

3
components/esp_system/port/soc/esp32c2/cache_err_int.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -20,7 +20,6 @@
static const char *TAG = "CACHE_ERR";
#define DIM(array) (sizeof(array)/sizeof(*array))
/**

3
components/esp_system/port/soc/esp32c2/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -54,7 +54,6 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
static const char *TAG = "clk";
__attribute__((weak)) void esp_clk_init(void)
{
#if !CONFIG_IDF_ENV_FPGA

3
components/esp_system/port/soc/esp32c3/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -55,7 +55,6 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk);
static const char *TAG = "clk";
__attribute__((weak)) void esp_clk_init(void)
{
#if !CONFIG_IDF_ENV_FPGA

2
components/esp_system/port/soc/esp32c3/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/port/soc/esp32c6/cache_err_int.c
View File

@@ -20,7 +20,6 @@
static const char *TAG = "CACHE_ERR";
const char cache_error_msg[] = "Cache access error";
const char *esp_cache_err_panic_string(void)

3
components/esp_system/port/soc/esp32c6/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -40,7 +40,6 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src);
static const char *TAG = "clk";
__attribute__((weak)) void esp_clk_init(void)
{
#if !CONFIG_IDF_ENV_FPGA

2
components/esp_system/port/soc/esp32c6/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

3
components/esp_system/port/soc/esp32h2/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -40,7 +40,6 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src);
static const char *TAG = "clk";
__attribute__((weak)) void esp_clk_init(void)
{
#if !CONFIG_IDF_ENV_FPGA

2
components/esp_system/port/soc/esp32h2/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

3
components/esp_system/port/soc/esp32p4/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -39,7 +39,6 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src);
static const char *TAG = "clk";
__attribute__((weak)) void esp_clk_init(void)
{
#if SOC_PMU_SUPPORTED

2
components/esp_system/port/soc/esp32p4/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/port/soc/esp32s2/clk.c
View File

@@ -309,7 +309,6 @@ __attribute__((weak)) void esp_perip_clk_init(void)
DPORT_CLEAR_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_8M);
DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW);
/* Enable RNG clock. */
periph_module_enable(PERIPH_RNG_MODULE);
}

2
components/esp_system/port/soc/esp32s2/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_system/port/soc/esp32s3/clk.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

2
components/esp_system/port/soc/esp32s3/reset_reason.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

1
components/esp_system/port/soc/esp32s3/system_internal.c
View File

@@ -80,7 +80,6 @@ void IRAM_ATTR esp_restart_noos(void)
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, true);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
// Disable TG0/TG1 watchdogs
wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt0_context);

6
components/esp_system/port/usb_console.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -55,7 +55,6 @@ typedef enum {
REBOOT_BOOTLOADER_DFU,
} reboot_type_t;
static reboot_type_t s_queue_reboot = REBOOT_NONE;
static int s_prev_rts_state;
static intr_handle_t s_usb_int_handle;
@@ -87,12 +86,10 @@ void esp_usb_console_write_char(char c);
#define ISR_FLAG 0
#endif // CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Optional write lock routines; used only if esp_rom_printf output via CDC is enabled */
static inline void write_lock_acquire(void);
static inline void write_lock_release(void);
/* Other forward declarations */
void esp_usb_console_before_restart(void);
@@ -441,7 +438,6 @@ bool esp_usb_console_write_available(void)
return cdc_acm_irq_tx_ready(s_cdc_acm_device) != 0;
}
#ifdef CONFIG_ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
/* Used as an output function by esp_rom_printf.
* The LF->CRLF replacement logic replicates the one in esp_rom_uart_putc.

2
components/esp_system/stack_check.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

7
components/esp_system/startup.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -56,7 +56,6 @@ const sys_startup_fn_t g_startup_fn[1] = { start_cpu0 };
static const char* TAG = "cpu_start";
/**
* Xtensa gcc is configured to emit a .ctors section, RISC-V gcc is configured with --enable-initfini-array
* so it emits an .init_array section instead.
@@ -78,7 +77,9 @@ static void do_global_ctors(void)
extern void (*__init_array_end)(void);
#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
struct object { long placeholder[ 10 ]; };
struct object {
long placeholder[ 10 ];
};
void __register_frame_info(const void *begin, struct object * ob);
extern char __eh_frame[];

10
components/esp_system/task_wdt/task_wdt.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -25,17 +25,14 @@
#include "esp_private/esp_task_wdt.h"
#include "esp_private/esp_task_wdt_impl.h"
#if CONFIG_IDF_TARGET_ARCH_RISCV
#include "riscv/rvruntime-frames.h"
#endif //CONFIG_IDF_TARGET_ARCH_RISCV
#if CONFIG_ESP_SYSTEM_USE_EH_FRAME
#include "esp_private/eh_frame_parser.h"
#endif // CONFIG_ESP_SYSTEM_USE_EH_FRAME
#if CONFIG_IDF_TARGET_ARCH_RISCV && !CONFIG_ESP_SYSTEM_USE_EH_FRAME
/* Function used to print all the registers pointed by the given frame .*/
extern void panic_print_registers(const void *frame, int core);
@@ -291,7 +288,6 @@ static void unsubscribe_idle(uint32_t core_mask)
}
}
/**
* @brief Subscribes the idle tasks of one or more cores
*
@@ -318,7 +314,6 @@ static void subscribe_idle(uint32_t core_mask)
}
}
/**
* The behavior of the Task Watchdog depends on the configuration from the `menuconfig`.
* It can be summarized as follow, regardless of the target:
@@ -406,8 +401,6 @@ void task_wdt_timeout_abort(bool current_core)
xt_unhandled_exception(frame);
}
static void task_wdt_timeout_handling(int cores_fail, bool panic)
{
const int current_core = xPortGetCoreID();
@@ -450,7 +443,6 @@ static void task_wdt_timeout_handling(int cores_fail, bool panic)
}
}
// ---------------------- Callbacks ------------------------
/**

8
components/esp_system/task_wdt/task_wdt_impl_esp_timer.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,7 +33,6 @@ static twdt_ctx_soft_t init_context;
static const char *TAG = "task_wdt_impl_soft";
esp_err_t esp_task_wdt_impl_timer_allocate(const esp_task_wdt_config_t *config,
twdt_isr_callback callback,
twdt_ctx_t *obj)
@@ -81,7 +80,6 @@ esp_err_t esp_task_wdt_impl_timer_reconfigure(twdt_ctx_t obj, const esp_task_wdt
return ret;
}
void esp_task_wdt_impl_timer_free(twdt_ctx_t obj)
{
const twdt_ctx_soft_t* ctx = (twdt_ctx_soft_t*) obj;
@@ -91,7 +89,6 @@ void esp_task_wdt_impl_timer_free(twdt_ctx_t obj)
}
}
esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;
@@ -109,13 +106,11 @@ esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj)
return ret;
}
void esp_task_wdt_impl_timeout_triggered(twdt_ctx_t obj)
{
(void) obj;
}
esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;
@@ -132,7 +127,6 @@ esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj)
return ret;
}
esp_err_t esp_task_wdt_impl_timer_restart(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;

10
components/esp_system/task_wdt/task_wdt_impl_timergroup.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -39,8 +39,6 @@ typedef struct {
* init function. */
static twdt_ctx_hard_t init_context;
esp_err_t esp_task_wdt_impl_timer_allocate(const esp_task_wdt_config_t *config,
twdt_isr_callback callback,
twdt_ctx_t *obj)
@@ -81,7 +79,6 @@ esp_err_t esp_task_wdt_impl_timer_allocate(const esp_task_wdt_config_t *config,
return ret;
}
esp_err_t esp_task_wdt_impl_timer_reconfigure(twdt_ctx_t obj, const esp_task_wdt_config_t *config)
{
esp_err_t ret = ESP_OK;
@@ -103,7 +100,6 @@ esp_err_t esp_task_wdt_impl_timer_reconfigure(twdt_ctx_t obj, const esp_task_wdt
return ret;
}
void esp_task_wdt_impl_timer_free(twdt_ctx_t obj)
{
twdt_ctx_hard_t* ctx = (twdt_ctx_hard_t*) obj;
@@ -125,7 +121,6 @@ void esp_task_wdt_impl_timer_free(twdt_ctx_t obj)
}
}
esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;
@@ -144,7 +139,6 @@ esp_err_t esp_task_wdt_impl_timer_feed(twdt_ctx_t obj)
return ret;
}
void esp_task_wdt_impl_timeout_triggered(twdt_ctx_t obj)
{
twdt_ctx_hard_t* ctx = (twdt_ctx_hard_t*) obj;
@@ -157,7 +151,6 @@ void esp_task_wdt_impl_timeout_triggered(twdt_ctx_t obj)
}
}
esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;
@@ -176,7 +169,6 @@ esp_err_t esp_task_wdt_impl_timer_stop(twdt_ctx_t obj)
return ret;
}
esp_err_t esp_task_wdt_impl_timer_restart(twdt_ctx_t obj)
{
esp_err_t ret = ESP_OK;

11
components/esp_system/test_apps/esp_system_unity_tests/main/port/arch/riscv/test_ipc_isr.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,18 +9,21 @@
#if CONFIG_ESP_IPC_ISR_ENABLE
void esp_test_ipc_isr_callback(void *arg) {
void esp_test_ipc_isr_callback(void *arg)
{
uint32_t value = 0xa5a5;
*(volatile uint32_t*)arg = value;
}
void esp_test_ipc_isr_get_other_core_id(void *arg) {
void esp_test_ipc_isr_get_other_core_id(void *arg)
{
uint32_t core_id;
__asm volatile("csrr %0, mhartid" : "=r"(core_id));
*(volatile uint32_t*)arg = core_id;
}
void esp_test_ipc_isr_get_cycle_count_other_cpu(void *arg) {
void esp_test_ipc_isr_get_cycle_count_other_cpu(void *arg)
{
uint32_t cycle_count;
__asm volatile("rdcycle %0;" : "=r"(cycle_count));
*(volatile uint32_t*)arg = cycle_count;

7
components/esp_system/test_apps/esp_system_unity_tests/main/test_backtrace.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -30,7 +30,6 @@
#define ACTION_INT_WDT -2
#define TASK_PRIORITY 5
// Set to (-1) for abort(), (-2) for interrupt watchdog
static int backtrace_trigger_source;
@@ -85,7 +84,6 @@ TEST_CASE_MULTIPLE_STAGES("Test backtrace from abort", "[reset_reason][reset=abo
do_abort,
check_reset_reason_panic)
static void do_wdt_timeout(void)
{
//Allocate level one and three SW interrupts
@@ -104,7 +102,6 @@ TEST_CASE_MULTIPLE_STAGES("Test backtrace from interrupt watchdog timeout", "[re
do_wdt_timeout,
check_reset_reason_int_wdt)
static void write_char_crash(char c)
{
esp_rom_output_putc(c);
@@ -117,12 +114,10 @@ static void do_rom_crash(void)
esp_rom_printf("foo");
}
TEST_CASE_MULTIPLE_STAGES("Test backtrace with a ROM function", "[reset_reason][reset=StoreProhibited,SW_CPU_RESET]",
do_rom_crash,
check_reset_reason_panic)
#define NUM_TEST_FUNCS 2
static void backtrace_suspend_func(void *arg)

3
components/esp_system/test_apps/esp_system_unity_tests/main/test_ipc_isr.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -34,7 +34,6 @@ TEST_CASE("Test ipc_isr blocking IPC function calls a ASM function", "[ipc]")
void esp_test_ipc_isr_get_other_core_id(void* arg);
TEST_CASE("Test ipc_isr blocking IPC function calls get_other_core_id", "[ipc]")
{
int val = 0x5a5a;

7
components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
View File

@@ -97,7 +97,6 @@
#endif // CONFIG_IDF_TARGET_ESP32
/* This test needs special test runners: rev1 silicon, and SPI flash with
* fast start-up time. Otherwise reset reason will be RTCWDT_RESET.
*/
@@ -106,7 +105,6 @@ TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
}
static __NOINIT_ATTR uint32_t s_noinit_val;
#if CHECK_RTC_MEM
@@ -247,7 +245,6 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart from APP CPU",
check_reset_reason_sw);
#endif
static void do_int_wdt(void)
{
setup_values();
@@ -260,7 +257,6 @@ static void do_int_wdt(void)
while (1);
}
static void do_int_wdt_hw(void)
{
setup_values();
@@ -359,7 +355,6 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_WDT after RTC watchdog",
do_rtc_wdt,
check_reset_reason_any_wdt);
static void do_brownout(void)
{
setup_values();
@@ -387,7 +382,6 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event",
do_brownout,
check_reset_reason_brownout);
#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
#ifndef CONFIG_FREERTOS_UNICORE
#if CONFIG_IDF_TARGET_ARCH_XTENSA
@@ -474,5 +468,4 @@ TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after an exception in a ta
#endif // CONFIG_FREERTOS_UNICORE
#endif // CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
/* Not tested here: ESP_RST_SDIO */

3
components/esp_system/test_apps/esp_system_unity_tests/main/test_shared_stack_printf.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
@@ -56,7 +56,6 @@ TEST_CASE("test printf using shared buffer stack", "[shared_stack]")
printf("shared_stack: %p\n", (void *)shared_stack);
printf("shared_stack expected top: %p\n", (void *)(shared_stack + SHARED_STACK_SIZE));
esp_execute_shared_stack_function(printf_lock,
shared_stack,
SHARED_STACK_SIZE,

5
components/esp_system/test_apps/esp_system_unity_tests/main/test_sleep.c
View File

@@ -43,7 +43,6 @@
#define ESP_EXT0_WAKEUP_LEVEL_HIGH 1
__attribute__((unused)) static struct timeval tv_start, tv_stop;
static void check_sleep_reset(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
@@ -90,7 +89,6 @@ TEST_CASE_MULTIPLE_STAGES("wake up from deep sleep using timer", "[deepsleep][re
do_deep_sleep_timer,
check_sleep_reset)
static void do_light_sleep_deep_sleep_timer(void)
{
esp_sleep_enable_timer_wakeup(1000000);
@@ -179,7 +177,6 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]")
#define MAX_SLEEP_TIME_ERROR_US 100
#endif
TEST_CASE("light sleep duration is correct", "[deepsleep][ignore]")
{
// don't power down XTAL — powering it up takes different time on
@@ -219,7 +216,6 @@ TEST_CASE("light sleep duration is correct", "[deepsleep][ignore]")
}
}
TEST_CASE("light sleep and frequency switching", "[deepsleep]")
{
#ifndef CONFIG_PM_ENABLE
@@ -323,7 +319,6 @@ TEST_CASE_MULTIPLE_STAGES("can set sleep wake stub", "[deepsleep][reset=DEEPSLEE
check_wake_stub);
#endif // SOC_RTC_FAST_MEM_SUPPORTED
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
/* Version of prepare_wake_stub() that sets up the deep sleep call while running

3
components/esp_system/test_eh_frame_parser/esp_private/panic_internal.h
View File

@@ -13,9 +13,10 @@
static inline void panic_print_str(const char* str)
{
/* Ignore "Backtrace:" string. */
if (strcmp(str, "Backtrace:") != 0)
if (strcmp(str, "Backtrace:") != 0) {
printf("%s", str);
}
}
static inline void panic_print_hex(const uint32_t value)
{

46
components/esp_system/test_eh_frame_parser/main.c
View File

@@ -1,6 +1,6 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -181,7 +181,8 @@ static uint32_t iteration = 1;
* @brief Override the default function called when a backtrace step is
* generated.
*/
void esp_eh_frame_generated_step(uint32_t pc, uint32_t sp) {
void esp_eh_frame_generated_step(uint32_t pc, uint32_t sp)
{
/* The first PCs in the backtrace are calls to `browse_list()` + 2.
* This is due to the fact that the list contains all the numbers
* between NUMBER_TO_TEST to 0 included. Moreover, another call
@@ -198,19 +199,19 @@ void esp_eh_frame_generated_step(uint32_t pc, uint32_t sp) {
* browse_list (NUMBER_TO_TEST + 2 iterations), is_even
* (NUMBER_TO_TEST/2 calls) and is_odd (NUMBER_TO_TEST/2 calls) calls.
*/
if (iteration >= NUMBER_OF_ITERATION)
if (iteration >= NUMBER_OF_ITERATION) {
return;
else if (iteration % 2 == 0)
} else if (iteration % 2 == 0) {
assert(is_pc_in_function(pc, "is_odd"));
else
} else {
assert(is_pc_in_function(pc, "is_even"));
}
}
/* Number of times this function has been entered. */
iteration++;
}
/**
* @brief Handler called when SIGSEV signal is sent to the program.
*
@@ -219,7 +220,8 @@ void esp_eh_frame_generated_step(uint32_t pc, uint32_t sp) {
* @param ucontext Context of the program when the error occurred. This
* is used to retrieve the CPU registers value.
*/
void signal_handler(int signal, siginfo_t *info, void *ucontext) {
void signal_handler(int signal, siginfo_t *info, void *ucontext)
{
/* Setup the execution frame as expected by the eh_frame_parser.
* Indeed, the registers index defined in ucontext.h are NOT the same
* the registers index DWARF is expecting. */
@@ -265,7 +267,8 @@ void signal_handler(int signal, siginfo_t *info, void *ucontext) {
*
* @param l List to browse.
*/
void browse_list(struct list_t* l) {
void browse_list(struct list_t* l)
{
browse_list(l->next);
}
@@ -274,7 +277,8 @@ void browse_list(struct list_t* l) {
*
* @param n Number to add in the list.
*/
void add_number_to_list(uint32_t n) {
void add_number_to_list(uint32_t n)
{
struct list_t* l = malloc(sizeof(struct list_t));
l->value = n;
l->next = head.next;
@@ -289,7 +293,8 @@ void add_number_to_list(uint32_t n) {
*
* @return true if even, false else.
*/
bool is_even(uint32_t n) {
bool is_even(uint32_t n)
{
add_number_to_list(n);
if (n == 0) {
browse_list(head.next);
@@ -306,7 +311,8 @@ bool is_even(uint32_t n) {
*
* @return true if odd, false else.
*/
bool is_odd(uint32_t n) {
bool is_odd(uint32_t n)
{
add_number_to_list(n);
if (n == 0) {
browse_list(head.next);
@@ -331,8 +337,9 @@ static inline void initialize_functions_info(void)
* Thus, we will look for these instructions. */
uint8_t* instructions = (uint8_t*) funs[i].start;
while ((instructions[0] != 0xc9 || instructions[1] != 0xc3) &&
(instructions[0] != 0x5d || instructions[1] != 0xc3) )
(instructions[0] != 0x5d || instructions[1] != 0xc3)) {
instructions++;
}
instructions += 1;
funs[i].end = (uintptr_t) instructions;
}
@@ -341,7 +348,8 @@ static inline void initialize_functions_info(void)
/**
* Test the eh_frame_parser for backtracing
*/
void test2(void) {
void test2(void)
{
/* Initialize the structure holding information about the signal to override. */
struct sigaction sig = {
.sa_mask = 0,
@@ -367,7 +375,8 @@ void test2(void) {
* Important: the stack must still be alive when analyzing it, thus it must be done
* within the nested functions.
*/
int analyse_callstack() {
int analyse_callstack()
{
unw_context_t ucp = { 0 };
unw_cursor_t cur = { 0 };
unw_word_t pc = 0;
@@ -393,15 +402,18 @@ int analyse_callstack() {
return UNW_ESUCCESS;
}
int __attribute__((noinline)) inner_function2(void) {
int __attribute__((noinline)) inner_function2(void)
{
return analyse_callstack();
}
int __attribute__((noinline)) inner_function1(void) {
int __attribute__((noinline)) inner_function1(void)
{
return inner_function2();
}
void __attribute__((noinline)) test1() {
void __attribute__((noinline)) test1()
{
(void) inner_function1();
}

2
components/esp_system/ubsan.c
View File

@@ -34,7 +34,6 @@
#include "esp_rom_sys.h"
#include "esp_cpu.h"
struct source_location {
const char *file_name;
uint32_t line;
@@ -110,7 +109,6 @@ struct invalid_builtin_data {
unsigned char kind;
};
static void __ubsan_default_handler(struct source_location *loc, const char *func) __attribute__((noreturn));
/*

1
tools/ci/astyle-rules.yml
View File

@@ -68,7 +68,6 @@ components_not_formatted_temporary:
- "/components/esp_phy/"
- "/components/esp_pm/"
- "/components/esp_rom/"
- "/components/esp_system/"
- "/components/esp_timer/"
- "/components/esp_wifi/"
- "/components/esp-tls/"