Merge branch 'bugfix/unneeded_header_files' into 'master'

Remove some unneeded header files/deps

See merge request espressif/esp-idf!10237

components/esp32/dport_access.c

@@ -22,7 +22,6 @@
 #include <stdint.h>
 #include <string.h>
 
-#include <sdkconfig.h>
 #include "esp_attr.h"
 #include "esp_err.h"
 #include "esp_intr_alloc.h"
@@ -38,6 +37,8 @@
 
 #include "xtensa/core-macros.h"
 
+#include "sdkconfig.h"
+
 #ifndef CONFIG_FREERTOS_UNICORE
 static portMUX_TYPE g_dport_mux = portMUX_INITIALIZER_UNLOCKED;
 

components/esp32/hw_random.c

@@ -20,7 +20,6 @@
 #include "esp_attr.h"
 #include "esp32/clk.h"
 #include "soc/wdev_reg.h"
-#include "freertos/FreeRTOSConfig.h"
 #include "xtensa/core-macros.h"
 
 uint32_t IRAM_ATTR esp_random(void)

components/esp32/include/esp32/dport_access.h

@@ -11,12 +11,15 @@
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 // See the License for the specific language governing permissions and
 // limitations under the License.
+#include <stdint.h>
 
 #include <sdkconfig.h>
 
 #ifndef _ESP_DPORT_ACCESS_H_
 #define _ESP_DPORT_ACCESS_H_
 
+#include "xtensa/xtruntime.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif

components/esp32/system_api_esp32.c

@@ -17,7 +17,6 @@
 #include "esp_private/system_internal.h"
 #include "esp_attr.h"
 #include "esp_efuse.h"
-#include "esp_wifi.h"
 #include "esp_log.h"
 #include "sdkconfig.h"
 #include "esp32/rom/cache.h"
@@ -30,7 +29,9 @@
 #include "soc/cpu.h"
 #include "soc/rtc.h"
 #include "hal/wdt_hal.h"
+#include "hal/cpu_hal.h"
 #include "freertos/xtensa_api.h"
+#include "soc/soc_memory_layout.h"
 
 #include "esp32/cache_err_int.h"
 
@@ -57,7 +58,7 @@ void IRAM_ATTR esp_restart_noos(void)
     // CPU must be reset before stalling, in case it was running a s32c1i
     // instruction. This would cause memory pool to be locked by arbiter
     // to the stalled CPU, preventing current CPU from accessing this pool.
-    const uint32_t core_id = xPortGetCoreID();
+    const uint32_t core_id = cpu_hal_get_core_id();
     const uint32_t other_core_id = (core_id == 0) ? 1 : 0;
     esp_cpu_reset(other_core_id);
     esp_cpu_stall(other_core_id);

components/esp32s2/hw_random.c

@@ -20,7 +20,6 @@
 #include "esp_attr.h"
 #include "esp32s2/clk.h"
 #include "soc/wdev_reg.h"
-#include "freertos/FreeRTOSConfig.h"
 #include "xtensa/core-macros.h"
 
 uint32_t IRAM_ATTR esp_random(void)

components/esp32s2/system_api_esp32s2.c

@@ -17,7 +17,6 @@
 #include "esp_system.h"
 #include "esp_private/system_internal.h"
 #include "esp_attr.h"
-#include "esp_wifi.h"
 #include "esp_log.h"
 #include "esp32s2/rom/cache.h"
 #include "esp_rom_uart.h"
@@ -30,6 +29,7 @@
 #include "soc/syscon_reg.h"
 #include "hal/wdt_hal.h"
 #include "freertos/xtensa_api.h"
+#include "hal/cpu_hal.h"
 
 /* "inner" restart function for after RTOS, interrupts & anything else on this
  * core are already stopped. Stalls other core, resets hardware,
@@ -55,7 +55,7 @@ void IRAM_ATTR esp_restart_noos(void)
     // CPU must be reset before stalling, in case it was running a s32c1i
     // instruction. This would cause memory pool to be locked by arbiter
     // to the stalled CPU, preventing current CPU from accessing this pool.
-    const uint32_t core_id = xPortGetCoreID();
+    const uint32_t core_id = cpu_hal_get_core_id();
 
     //Todo: Refactor to use Interrupt or Task Watchdog API, and a system level WDT context
     // Disable TG0/TG1 watchdogs

components/esp32s3/hw_random.c

@@ -20,7 +20,6 @@
 #include "esp_attr.h"
 #include "esp32s3/clk.h"
 #include "soc/wdev_reg.h"
-#include "freertos/FreeRTOSConfig.h"
 #include "xtensa/core-macros.h"
 
 uint32_t IRAM_ATTR esp_random(void)

components/esp32s3/system_api_esp32s3.c

@@ -17,7 +17,6 @@
 #include "esp_system.h"
 #include "esp_private/system_internal.h"
 #include "esp_attr.h"
-#include "esp_wifi.h"
 #include "esp_log.h"
 #include "esp32s3/rom/cache.h"
 #include "esp_rom_uart.h"
@@ -55,7 +54,7 @@ void IRAM_ATTR esp_restart_noos(void)
     // CPU must be reset before stalling, in case it was running a s32c1i
     // instruction. This would cause memory pool to be locked by arbiter
     // to the stalled CPU, preventing current CPU from accessing this pool.
-    const uint32_t core_id = xPortGetCoreID();
+    const uint32_t core_id = cpu_hal_get_core_id();
 #if !CONFIG_FREERTOS_UNICORE
     const uint32_t other_core_id = (core_id == 0) ? 1 : 0;
     esp_cpu_reset(other_core_id);

components/esp_common/src/brownout.c

@@ -16,16 +16,20 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stdbool.h>
-#include "sdkconfig.h"
+
-#include "esp_log.h"
+#include "esp_private/system_internal.h"
+#include "driver/rtc_cntl.h"
+
+#include "esp_rom_sys.h"
+
 #include "soc/soc.h"
 #include "soc/cpu.h"
 #include "soc/rtc_periph.h"
+#include "hal/cpu_hal.h"
+
 #include "hal/brownout_hal.h"
-#include "esp_private/system_internal.h"
+
-#include "driver/rtc_cntl.h"
+#include "sdkconfig.h"
-#include "freertos/FreeRTOS.h"
-#include "esp_rom_sys.h"
 
 #if defined(CONFIG_ESP32_BROWNOUT_DET_LVL)
 #define BROWNOUT_DET_LVL CONFIG_ESP32_BROWNOUT_DET_LVL
@@ -52,7 +56,7 @@ static void rtc_brownout_isr_handler(void *arg)
     /* Stall the other CPU to make sure the code running there doesn't use UART
      * at the same time as the following esp_rom_printf.
      */
-    esp_cpu_stall(!xPortGetCoreID());
+    esp_cpu_stall(!cpu_hal_get_core_id());
     esp_reset_reason_set_hint(ESP_RST_BROWNOUT);
     esp_rom_printf("\r\nBrownout detector was triggered\r\n\r\n");
     esp_restart_noos();

components/esp_system/panic.c

@@ -16,7 +16,6 @@
 #include "esp_err.h"
 #include "esp_attr.h"
 
-#include "esp_spi_flash.h"
 #include "esp_private/system_internal.h"
 #include "esp_private/gdbstub.h"
 #include "esp_private/usb_console.h"

components/esp_system/sleep_modes.c

@@ -19,6 +19,7 @@
 #include "esp_attr.h"
 #include "esp_sleep.h"
 #include "esp_private/esp_timer_private.h"
+#include "esp_private/system_internal.h"
 #include "esp_log.h"
 #include "esp_newlib.h"
 #include "esp_timer.h"
@@ -429,7 +430,7 @@ esp_err_t esp_light_sleep_start(void)
      */
     esp_timer_private_lock();
     s_config.rtc_ticks_at_sleep_start = rtc_time_get();
-    uint64_t frc_time_at_start = esp_timer_get_time();
+    uint64_t frc_time_at_start = esp_system_get_time();
     DPORT_STALL_OTHER_CPU_START();
 
     // Decide which power domains can be powered down
@@ -475,7 +476,7 @@ esp_err_t esp_light_sleep_start(void)
 
     // FRC1 has been clock gated for the duration of the sleep, correct for that.
     uint64_t rtc_ticks_at_end = rtc_time_get();
-    uint64_t frc_time_at_end = esp_timer_get_time();
+    uint64_t frc_time_at_end = esp_system_get_time();
 
     uint64_t rtc_time_diff = rtc_time_slowclk_to_us(rtc_ticks_at_end - s_config.rtc_ticks_at_sleep_start,
                                     esp_clk_slowclk_cal_get());

components/esp_wifi/CMakeLists.txt

@@ -35,7 +35,7 @@ idf_component_register(SRCS "src/coexist.c"
                             "${idf_target}/esp_adapter.c"
                     INCLUDE_DIRS "include" "${idf_target}/include"
                     REQUIRES esp_event
-                    PRIV_REQUIRES esp_pm wpa_supplicant nvs_flash esp_netif ${extra_priv_requires}
+                    PRIV_REQUIRES esp_timer esp_pm wpa_supplicant nvs_flash esp_netif ${extra_priv_requires}
                     LDFRAGMENTS "${ldfragments}")
 
 idf_build_get_property(build_dir BUILD_DIR)

components/esp_wifi/esp32/esp_adapter.c

@@ -48,6 +48,7 @@
 #include "esp_coexist_internal.h"
 #include "esp_coexist_adapter.h"
 #include "esp32/dport_access.h"
+#include "esp_timer.h"
 
 #define TAG "esp_adapter"
 

components/fatfs/test_fatfs_host/Makefile.files

@@ -16,7 +16,6 @@ INCLUDE_DIRS := \
 	$(addprefix ../../spi_flash/sim/stubs/, \
 		app_update/include \
 		driver/include \
-		esp32/include \
 		freertos/include \
 		log/include \
 		newlib/include \
@@ -25,6 +24,7 @@ INCLUDE_DIRS := \
 	) \
 	$(addprefix ../../../components/, \
 		esp_rom/include \
+		esp_system/include \
 		xtensa/include \
 		xtensa/esp32/include \
 		soc/soc/esp32/include \

components/hal/esp32/include/hal/clk_gate_ll.h

@@ -20,6 +20,7 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
+#include "esp_attr.h"
 #include "soc/periph_defs.h"
 #include "soc/dport_reg.h"
 #include "soc/dport_access.h"

components/hal/esp32s2/include/hal/clk_gate_ll.h

@@ -20,6 +20,7 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
+#include "esp_attr.h"
 #include "soc/periph_defs.h"
 #include "soc/system_reg.h"
 #include "soc/syscon_reg.h"

components/hal/esp32s3/include/hal/clk_gate_ll.h

@@ -20,6 +20,7 @@ extern "C" {
 
 #include <stdint.h>
 #include <stdbool.h>
+#include "esp_attr.h"
 #include "soc/periph_defs.h"
 #include "soc/system_reg.h"
 #include "soc/syscon_reg.h"

components/newlib/syscall_table.c

@@ -22,7 +22,6 @@
 #include <sys/signal.h>
 #include <sys/unistd.h>
 #include <sys/reent.h>
-#include "esp_vfs.h"
 #include "esp_newlib.h"
 #include "sdkconfig.h"
 #include "soc/soc_caps.h"

components/soc/soc/esp32/include/soc/dport_access.h

@@ -16,11 +16,11 @@
 #define _DPORT_ACCESS_H_
 
 #include <stdint.h>
+
 #include "esp_attr.h"
 #include "esp32/dport_access.h"
-#include "soc.h"
+
-#include "uart_reg.h"
+#include "sdkconfig.h"
-#include "xtensa/xtruntime.h"
 
 #ifdef __cplusplus
 extern "C" {

components/soc/soc/esp32s2/include/soc/dport_access.h

@@ -16,11 +16,8 @@
 #define _DPORT_ACCESS_H_
 
 #include <stdint.h>
-#include "esp_attr.h"
+
 #include "esp32s2/dport_access.h"
-#include "soc.h"
-#include "uart_reg.h"
-#include "xtensa/xtruntime.h"
 
 #ifdef __cplusplus
 extern "C" {

components/soc/soc/esp32s3/include/soc/dport_access.h

@@ -15,12 +15,8 @@
 #pragma once
 
 #include <stdint.h>
-#include "esp_attr.h"
+
-#include "esp_attr.h"
 #include "esp32s3/dport_access.h"
-#include "soc.h"
-#include "uart_reg.h"
-#include "xtensa/xtruntime.h"
 
 #ifdef __cplusplus
 extern "C" {

components/spi_flash/esp_flash_api.c

@@ -21,10 +21,9 @@
 #include "memspi_host_driver.h"
 #include "esp_log.h"
 #include "sdkconfig.h"
-#include "esp_heap_caps.h"
 #include "esp_flash_internal.h"
-#include <freertos/task.h>
+#include "esp_private/system_internal.h"
-#include "esp_timer.h"
+
 
 static const char TAG[] = "spi_flash";
 
@@ -378,7 +377,7 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui
 #endif
     while (err == ESP_OK && len >= sector_size) {
 #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
-        int64_t start_time_us = esp_timer_get_time();
+        int64_t start_time_us = esp_system_get_time();
 #endif
         err = rom_spiflash_api_funcs->start(chip);
         if (err != ESP_OK) {
@@ -403,7 +402,7 @@ esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, ui
         err = rom_spiflash_api_funcs->end(chip, err);
 
 #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
-        no_yield_time_us += (esp_timer_get_time() - start_time_us);
+        no_yield_time_us += (esp_system_get_time() - start_time_us);
         if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) {
             no_yield_time_us = 0;
             if (chip->os_func->yield) {

components/spi_flash/flash_ops.c

@@ -28,6 +28,7 @@
 #include "esp_attr.h"
 #include "esp_spi_flash.h"
 #include "esp_log.h"
+#include "esp_private/system_internal.h"
 #if CONFIG_IDF_TARGET_ESP32
 #include "esp32/rom/spi_flash.h"
 #include "esp32/rom/cache.h"
@@ -45,7 +46,6 @@
 #include "cache_utils.h"
 #include "esp_flash.h"
 #include "esp_attr.h"
-#include "esp_timer.h"
 
 esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_addr, const void *src, size_t size);
 
@@ -143,7 +143,6 @@ static __attribute__((unused)) bool is_safe_write_address(size_t addr, size_t si
     return true;
 }
 
-
 void spi_flash_init(void)
 {
     spi_flash_init_lock();
@@ -260,7 +259,7 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(size_t start_addr, size_t size)
 #endif
         for (size_t sector = start; sector != end && rc == ESP_ROM_SPIFLASH_RESULT_OK; ) {
 #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
-            int64_t start_time_us = esp_timer_get_time();
+            int64_t start_time_us = esp_system_get_time();
 #endif
             spi_flash_guard_start();
 #ifndef CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE
@@ -277,7 +276,7 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(size_t start_addr, size_t size)
             }
             spi_flash_guard_end();
 #ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
-            no_yield_time_us += (esp_timer_get_time() - start_time_us);
+            no_yield_time_us += (esp_system_get_time() - start_time_us);
             if (no_yield_time_us / 1000 >= CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) {
                 no_yield_time_us = 0;
                 if (s_flash_guard_ops && s_flash_guard_ops->yield) {

components/spi_flash/sim/Makefile.files

@@ -16,7 +16,6 @@ INCLUDE_DIRS := \
 	$(addprefix stubs/, \
 	app_update/include \
 	driver/include \
-	esp32/include \
 	esp_timer/include \
 	freertos/include \
 	log/include \
@@ -27,6 +26,7 @@ INCLUDE_DIRS := \
 	$(addprefix ../../../components/, \
 	esp_rom/include \
 	esp_common/include \
+	esp_system/include \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/soc/esp32/include \

components/spi_flash/sim/stubs/Makefile.files

@@ -12,7 +12,6 @@ INCLUDE_DIRS := \
 	../private_include \
 	app_update/include \
 	driver/include \
-	esp32/include \
 	esp_timer/include \
 	freertos/include \
 	log/include \
@@ -21,6 +20,7 @@ INCLUDE_DIRS := \
 	vfs/include \
 	$(addprefix ../../../../components/, \
 	esp_common/include \
+	esp_system/include \
 	soc/soc/esp32/include \
 	soc/include \
 	soc/soc/include \

components/spi_flash/sim/stubs/esp32/include/esp_system.h

@@ -1,15 +0,0 @@
-#pragma once
-
-#include <stdint.h>
-#include <stdio.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-uint32_t esp_random(void);
-
-#ifdef __cplusplus
-}
-#endif
-

components/spiffs/test_spiffs_host/Makefile.files

@@ -16,7 +16,6 @@ INCLUDE_DIRS := \
 	$(addprefix ../../spi_flash/sim/stubs/, \
 	app_update/include \
 	driver/include \
-	esp32/include \
 	freertos/include \
 	log/include \
 	newlib/include \
@@ -26,6 +25,7 @@ INCLUDE_DIRS := \
 	$(addprefix ../../../components/, \
 	esp_rom/include \
 	esp_common/include \
+	esp_system/include \
 	xtensa/include \
 	xtensa/esp32/include \
 	soc/soc/esp32/include \

components/wear_levelling/test_wl_host/Makefile.files

@@ -15,7 +15,6 @@ INCLUDE_DIRS := \
 	$(addprefix ../../spi_flash/sim/stubs/, \
 	app_update/include \
 	driver/include \
-	esp32/include \
 	freertos/include \
 	log/include \
 	newlib/include \
@@ -24,6 +23,7 @@ INCLUDE_DIRS := \
 	) \
 	$(addprefix ../../../components/, \
 	esp_rom/include \
+	esp_system/include \
 	esp_common/include \
 	xtensa/include \
 	xtensa/esp32/include \

components/xtensa/include/esp_debug_helpers.h

@@ -22,7 +22,7 @@ extern "C" {
 
 #include <stdbool.h>
 #include "esp_err.h"
-#include "soc/soc.h"
+#include "soc/soc.h"  // [refactor-todo] IDF-2297
 
 #define ESP_WATCHPOINT_LOAD 0x40000000
 #define ESP_WATCHPOINT_STORE 0x80000000

components/xtensa/include/xtensa-debug-module.h

@@ -1,6 +1,6 @@
 #ifndef XTENSA_DEBUG_MODULE_H
 #define XTENSA_DEBUG_MODULE_H
-#include "soc/cpu.h"
+
 /*
 ERI registers / OCD offsets and field definitions
 */