diff --git a/examples/phy/cert_test/main/cmd_ble_dtm.c b/examples/phy/cert_test/main/cmd_ble_dtm.c
index 90e9d8daf7..56def074c6 100644
--- a/examples/phy/cert_test/main/cmd_ble_dtm.c
+++ b/examples/phy/cert_test/main/cmd_ble_dtm.c
@@ -121,6 +121,36 @@ static int dtm_test_enable_command(int argc, char **argv)
     return 0;
 }
 
+extern int8_t esp_ble_get_dtm_rx_rssi(void);
+static int dtm_get_ble_rx_rssi_command(int argc, char **argv)
+{
+    int8_t rx_rssi = 0x7F;
+    if (esp_bt_controller_get_status() != ESP_BT_CONTROLLER_STATUS_ENABLED) {
+        esp_rom_printf("\nPlease enable BLE DTM mode first by using the command enable_ble_dtm -e 1 before sending this command.\n");
+        return 2;
+    }
+
+    rx_rssi = esp_ble_get_dtm_rx_rssi();
+    if (rx_rssi == 0x7f) {
+        esp_rom_printf("\nRx RSSI is not available!\n");
+    } else {
+        esp_rom_printf("\nRx RSSI is %d dBm\n", rx_rssi);
+    }
+
+    return 0;
+}
+
+esp_err_t esp_console_register_get_ble_rx_rssi_command(void)
+{
+    esp_console_cmd_t command = {
+        .command = "get_ble_rx_rssi",
+        .help = "Get ble rx rssi during DTM",
+        .func = &dtm_get_ble_rx_rssi_command,
+    };
+
+    return esp_console_cmd_register(&command);
+}
+
 esp_err_t esp_console_register_set_ble_tx_power_command(void)
 {
     dtm_set_tx_power_cmd_args.cmd_params = arg_int1("i", "index", "<index>","tx power level index");
@@ -185,5 +215,6 @@ esp_err_t dtm_configuration_command_register(void)
     esp_console_register_get_ble_tx_power_command();
     esp_console_register_reconfig_dtm_pins_command();
     esp_console_register_enable_ble_dtm_command();
+    esp_console_register_get_ble_rx_rssi_command();
     return ESP_OK;
 }
diff --git a/examples/phy/cert_test/sdkconfig.defaults.esp32c6 b/examples/phy/cert_test/sdkconfig.defaults.esp32c6
index 8ae9f0ef3b..1dce7aaed0 100644
--- a/examples/phy/cert_test/sdkconfig.defaults.esp32c6
+++ b/examples/phy/cert_test/sdkconfig.defaults.esp32c6
@@ -4,6 +4,7 @@
 
 CONFIG_COMMANDS_ENABLE_BLE_DTM_TEST=y
 CONFIG_BT_CONTROLLER_ONLY=y
+CONFIG_BT_LE_DTM_ENABLED=y
 CONFIG_BT_LE_HCI_INTERFACE_USE_UART=y
 CONFIG_BT_LE_HCI_UART_TX_PIN=8
 CONFIG_BT_LE_HCI_UART_RX_PIN=9
diff --git a/examples/phy/cert_test/sdkconfig.defaults.esp32h2 b/examples/phy/cert_test/sdkconfig.defaults.esp32h2
index 6cc9f6cd96..c4828b6211 100644
--- a/examples/phy/cert_test/sdkconfig.defaults.esp32h2
+++ b/examples/phy/cert_test/sdkconfig.defaults.esp32h2
@@ -1,8 +1,9 @@
 #
-# ESP32C6-specific
+# ESP32H2-specific
 #
 CONFIG_COMMANDS_ENABLE_BLE_DTM_TEST=y
 CONFIG_BT_CONTROLLER_ONLY=y
+CONFIG_BT_LE_DTM_ENABLED=y
 CONFIG_BT_LE_HCI_INTERFACE_USE_UART=y
 CONFIG_BT_LE_HCI_UART_TX_PIN=8
 CONFIG_BT_LE_HCI_UART_RX_PIN=9