From 0999aeedbde55cfdb8f8d9c1054463b1a106c022 Mon Sep 17 00:00:00 2001 From: morris Date: Wed, 16 Jul 2025 17:34:08 +0800 Subject: [PATCH] refactor(timg): clean up soc layer meta data --- components/esp_driver_gptimer/src/gptimer.c | 22 ++-- .../esp_driver_gptimer/src/gptimer_common.c | 22 ++-- .../esp_driver_gptimer/src/gptimer_priv.h | 4 +- .../test_apps/gptimer/main/test_gptimer.c | 108 +++++++++--------- components/esp_gdbstub/src/gdbstub.c | 14 +-- components/esp_hw_support/sleep_modes.c | 4 +- .../esp_hw_support/sleep_system_peripheral.c | 5 +- .../main/test_intr_alloc.c | 30 ++--- components/esp_rom/patches/esp_rom_wdt.c | 2 +- components/esp_system/int_wdt.c | 4 +- components/esp_system/panic.c | 8 +- components/hal/esp32/include/hal/timer_ll.h | 5 + components/hal/esp32c3/include/hal/timer_ll.h | 5 + components/hal/esp32c5/include/hal/timer_ll.h | 5 + components/hal/esp32c6/include/hal/timer_ll.h | 5 + .../hal/esp32c61/include/hal/timer_ll.h | 5 + .../hal/esp32h21/include/hal/timer_ll.h | 6 +- components/hal/esp32h4/include/hal/timer_ll.h | 5 + components/hal/esp32p4/include/hal/timer_ll.h | 5 + components/hal/esp32s2/include/hal/timer_ll.h | 5 + components/hal/esp32s3/include/hal/timer_ll.h | 5 + components/soc/esp32/timer_periph.c | 43 ++++--- components/soc/esp32c2/timer_periph.c | 16 +-- components/soc/esp32c3/timer_periph.c | 30 ++--- components/soc/esp32c5/timer_periph.c | 32 +++--- components/soc/esp32c5/wdt_periph.c | 2 +- components/soc/esp32c6/timer_periph.c | 32 +++--- components/soc/esp32c6/wdt_periph.c | 2 +- components/soc/esp32c61/timer_periph.c | 32 +++--- components/soc/esp32c61/wdt_periph.c | 2 +- components/soc/esp32h2/timer_periph.c | 32 +++--- components/soc/esp32h2/wdt_periph.c | 2 +- components/soc/esp32h21/timer_periph.c | 34 +++--- components/soc/esp32h21/wdt_periph.c | 2 +- components/soc/esp32h4/timer_periph.c | 34 +++--- components/soc/esp32h4/wdt_periph.c | 2 +- components/soc/esp32p4/timer_periph.c | 44 +++---- components/soc/esp32p4/wdt_periph.c | 2 +- components/soc/esp32s2/timer_periph.c | 42 +++---- components/soc/esp32s3/timer_periph.c | 42 +++---- components/soc/include/soc/timer_periph.h | 39 ++++--- components/soc/include/soc/wdt_periph.h | 4 +- examples/peripherals/.build-test-rules.yml | 2 +- .../system/memprot/main/esp32c3/test_panic.c | 4 +- .../system/memprot/main/esp32s2/test_panic.c | 4 +- .../system/memprot/main/esp32s3/test_panic.c | 4 +- 46 files changed, 380 insertions(+), 378 deletions(-) diff --git a/components/esp_driver_gptimer/src/gptimer.c b/components/esp_driver_gptimer/src/gptimer.c index 3856a98f95..8913ff04ef 100644 --- a/components/esp_driver_gptimer/src/gptimer.c +++ b/components/esp_driver_gptimer/src/gptimer.c @@ -17,9 +17,9 @@ static esp_err_t gptimer_create_sleep_retention_link_cb(void *timer) { int group_id = ((gptimer_t *)timer)->group->group_id; int timer_id = ((gptimer_t *)timer)->timer_id; - esp_err_t err = sleep_retention_entries_create(tg_timer_reg_retention_info[group_id][timer_id].regdma_entry_array, - tg_timer_reg_retention_info[group_id][timer_id].array_size, - REGDMA_LINK_PRI_GPTIMER, tg_timer_reg_retention_info[group_id][timer_id].module); + esp_err_t err = sleep_retention_entries_create(soc_timg_gptimer_retention_infos[group_id][timer_id].regdma_entry_array, + soc_timg_gptimer_retention_infos[group_id][timer_id].array_size, + REGDMA_LINK_PRI_GPTIMER, soc_timg_gptimer_retention_infos[group_id][timer_id].module); return err; } @@ -27,7 +27,7 @@ static void gptimer_create_retention_module(gptimer_t *timer) { int group_id = timer->group->group_id; int timer_id = timer->timer_id; - sleep_retention_module_t module = tg_timer_reg_retention_info[group_id][timer_id].module; + sleep_retention_module_t module = soc_timg_gptimer_retention_infos[group_id][timer_id].module; if (sleep_retention_is_module_inited(module) && !sleep_retention_is_module_created(module)) { if (sleep_retention_module_allocate(module) != ESP_OK) { // even though the sleep retention module create failed, GPTimer driver should still work, so just warning here @@ -41,12 +41,12 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer) { gptimer_group_t *group = NULL; int timer_id = -1; - for (int i = 0; i < SOC_TIMER_GROUPS; i++) { + for (int i = 0; i < SOC_TIMG_ATTR(INST_NUM); i++) { group = gptimer_acquire_group_handle(i); ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i); // loop to search free timer in the group portENTER_CRITICAL(&group->spinlock); - for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) { + for (int j = 0; j < SOC_GPTIMER_ATTR(TIMERS_PER_TIMG); j++) { if (!group->timers[j]) { timer_id = j; group->timers[j] = timer; @@ -65,7 +65,7 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer) ESP_RETURN_ON_FALSE(timer_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free timer"); #if GPTIMER_USE_RETENTION_LINK - sleep_retention_module_t module = tg_timer_reg_retention_info[group->group_id][timer_id].module; + sleep_retention_module_t module = soc_timg_gptimer_retention_infos[group->group_id][timer_id].module; sleep_retention_module_init_param_t init_param = { .cbs = { .create = { @@ -93,7 +93,7 @@ static void gptimer_unregister_from_group(gptimer_t *timer) portEXIT_CRITICAL(&group->spinlock); #if GPTIMER_USE_RETENTION_LINK - sleep_retention_module_t module = tg_timer_reg_retention_info[group->group_id][timer_id].module; + sleep_retention_module_t module = soc_timg_gptimer_retention_infos[group->group_id][timer_id].module; if (sleep_retention_is_module_created(module)) { sleep_retention_module_free(module); } @@ -209,11 +209,11 @@ esp_err_t gptimer_del_timer(gptimer_handle_t timer) ESP_RETURN_ON_ERROR(gptimer_destroy(timer), TAG, "destroy gptimer failed"); switch (clk_src) { -#if SOC_TIMER_GROUP_SUPPORT_RC_FAST +#if TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST case GPTIMER_CLK_SRC_RC_FAST: periph_rtc_dig_clk8m_disable(); break; -#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST +#endif // TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST default: break; } @@ -288,7 +288,7 @@ esp_err_t gptimer_register_event_callbacks(gptimer_handle_t timer, const gptimer if (timer->intr_priority) { isr_flags |= 1 << (timer->intr_priority); } - ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_id].timer_irq_id[timer_id], isr_flags, + ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(soc_timg_gptimer_signals[group_id][timer_id].irq_id, isr_flags, (uint32_t)timer_ll_get_intr_status_reg(timer->hal.dev), TIMER_LL_EVENT_ALARM(timer_id), gptimer_default_isr, timer, &timer->intr), TAG, "install interrupt service failed"); } diff --git a/components/esp_driver_gptimer/src/gptimer_common.c b/components/esp_driver_gptimer/src/gptimer_common.c index 67d3a0cdab..b06f5f17c8 100644 --- a/components/esp_driver_gptimer/src/gptimer_common.c +++ b/components/esp_driver_gptimer/src/gptimer_common.c @@ -12,8 +12,8 @@ typedef struct gptimer_platform_t { _lock_t mutex; // platform level mutex lock - gptimer_group_t *groups[SOC_TIMER_GROUPS]; // timer group pool - int group_ref_counts[SOC_TIMER_GROUPS]; // reference count used to protect group install/uninstall + gptimer_group_t *groups[SOC_TIMG_ATTR(INST_NUM)]; // timer group pool + int group_ref_counts[SOC_TIMG_ATTR(INST_NUM)]; // reference count used to protect group install/uninstall } gptimer_platform_t; // gptimer driver platform, it's always a singleton @@ -48,7 +48,7 @@ gptimer_group_t *gptimer_acquire_group_handle(int group_id) // !!! HARDWARE SHARED RESOURCE !!! // the gptimer and watchdog reside in the same the timer group // we need to increase/decrease the reference count before enable/disable/reset the peripheral - PERIPH_RCC_ACQUIRE_ATOMIC(timer_group_periph_signals.groups[group_id].module, ref_count) { + PERIPH_RCC_ACQUIRE_ATOMIC(soc_timg_gptimer_signals[group_id][0].parent_module, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(group_id, true); timer_ll_reset_register(group_id); @@ -76,7 +76,7 @@ void gptimer_release_group_handle(gptimer_group_t *group) if (do_deinitialize) { // disable bus clock for the timer group - PERIPH_RCC_RELEASE_ATOMIC(timer_group_periph_signals.groups[group_id].module, ref_count) { + PERIPH_RCC_RELEASE_ATOMIC(soc_timg_gptimer_signals[group_id][0].parent_module, ref_count) { if (ref_count == 0) { timer_ll_enable_bus_clock(group_id, false); } @@ -92,13 +92,13 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s int timer_id = timer->timer_id; int group_id = timer->group->group_id; // TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source -#if SOC_TIMER_GROUP_SUPPORT_RC_FAST +#if TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST if (src_clk == GPTIMER_CLK_SRC_RC_FAST) { // RC_FAST clock is not enabled automatically on start up, we enable it here manually. // Note there's a ref count in the enable/disable function, we must call them in pair in the driver. periph_rtc_dig_clk8m_enable(); } -#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST +#endif // TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST timer->clk_src = src_clk; // get clock source frequency @@ -111,19 +111,19 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s // driver will create different pm lock for that purpose, according to different clock source esp_pm_lock_type_t pm_lock_type = ESP_PM_NO_LIGHT_SLEEP; -#if SOC_TIMER_GROUP_SUPPORT_RC_FAST +#if TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST if (src_clk == GPTIMER_CLK_SRC_RC_FAST) { // RC_FAST won't be turn off in sleep and won't change its frequency during DFS need_pm_lock = false; } -#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST +#endif // TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST -#if SOC_TIMER_GROUP_SUPPORT_APB +#if TIMER_LL_FUNC_CLOCK_SUPPORT_APB if (src_clk == GPTIMER_CLK_SRC_APB) { // APB clock frequency can be changed during DFS pm_lock_type = ESP_PM_APB_FREQ_MAX; } -#endif // SOC_TIMER_GROUP_SUPPORT_APB +#endif // TIMER_LL_FUNC_CLOCK_SUPPORT_APB #if CONFIG_IDF_TARGET_ESP32C2 if (src_clk == GPTIMER_CLK_SRC_PLL_F40M) { @@ -135,7 +135,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s #endif // CONFIG_IDF_TARGET_ESP32C2 if (need_pm_lock) { - ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer_group_periph_signals.groups[group_id].module_name[timer_id], &timer->pm_lock), + ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, soc_timg_gptimer_signals[group_id][timer_id].module_name, &timer->pm_lock), TAG, "create pm lock failed"); } #endif // CONFIG_PM_ENABLE diff --git a/components/esp_driver_gptimer/src/gptimer_priv.h b/components/esp_driver_gptimer/src/gptimer_priv.h index 8abeae4941..0d1a0fd2c5 100644 --- a/components/esp_driver_gptimer/src/gptimer_priv.h +++ b/components/esp_driver_gptimer/src/gptimer_priv.h @@ -14,7 +14,7 @@ // Set the maximum log level for gptimer driver #define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE #endif -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "freertos/FreeRTOS.h" #include "esp_err.h" #include "esp_log.h" @@ -69,7 +69,7 @@ typedef struct gptimer_t gptimer_t; typedef struct gptimer_group_t { int group_id; portMUX_TYPE spinlock; // to protect per-group register level concurrent access - gptimer_t *timers[SOC_TIMER_GROUP_TIMERS_PER_GROUP]; + gptimer_t *timers[SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)]; } gptimer_group_t; typedef enum { diff --git a/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c b/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c index d0084885d9..df018f52be 100644 --- a/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c +++ b/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer.c @@ -10,7 +10,7 @@ #include "freertos/task.h" #include "unity.h" #include "driver/gptimer.h" -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "esp_attr.h" #if CONFIG_GPTIMER_ISR_CACHE_SAFE @@ -26,33 +26,33 @@ TEST_CASE("gptimer_set_get_raw_count", "[gptimer]") .direction = GPTIMER_COUNT_UP, .resolution_hz = 1 * 1000 * 1000, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&config, &timers[i])); } TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, gptimer_new_timer(&config, &timers[0])); unsigned long long get_value = 0; printf("check gptimer initial count value\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &get_value)); TEST_ASSERT_EQUAL(0, get_value); } unsigned long long set_values[] = {100, 500, 666}; for (size_t j = 0; j < sizeof(set_values) / sizeof(set_values[0]); j++) { - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { printf("set raw count to %llu for gptimer %d\r\n", set_values[j], i); TEST_ESP_OK(gptimer_set_raw_count(timers[i], set_values[j])); } vTaskDelay(pdMS_TO_TICKS(10)); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &get_value)); printf("get raw count of gptimer %d: %llu\r\n", i, get_value); TEST_ASSERT_EQUAL(set_values[j], get_value); } } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_del_timer(timers[i])); } } @@ -60,7 +60,7 @@ TEST_CASE("gptimer_set_get_raw_count", "[gptimer]") TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]") { gptimer_clock_source_t test_clk_srcs[] = SOC_GPTIMER_CLKS; - uint32_t timer_resolution_hz[SOC_TIMER_GROUP_TOTAL_TIMERS]; + uint32_t timer_resolution_hz[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; // test with various clock sources for (size_t i = 0; i < sizeof(test_clk_srcs) / sizeof(test_clk_srcs[0]); i++) { @@ -69,36 +69,36 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]") .direction = GPTIMER_COUNT_UP, .resolution_hz = 1 * 1000 * 1000, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); TEST_ESP_OK(gptimer_get_resolution(timers[i], &timer_resolution_hz[i])); } // start timer before enable should fail TEST_ESP_ERR(ESP_ERR_INVALID_STATE, gptimer_start(timers[0])); printf("enable timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_enable(timers[i])); } printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_start(timers[i])); } esp_rom_delay_us(20 * 1000); // 20ms = 20_000 ticks uint64_t value = 0; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value)); // convert the raw count to us value = value * 1000000 / timer_resolution_hz[i]; TEST_ASSERT_UINT_WITHIN(200, 20000, value); } printf("stop timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_stop(timers[i])); } printf("check whether timers have stopped\r\n"); esp_rom_delay_us(20 * 1000); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value)); printf("get raw count of gptimer %d: %llu\r\n", i, value); // convert the raw count to us @@ -106,17 +106,17 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]") TEST_ASSERT_UINT_WITHIN(400, 20000, value); //200 more threshold for cpu on stop process } printf("restart timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_start(timers[i])); } esp_rom_delay_us(20 * 1000); printf("stop timers again\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_stop(timers[i])); } printf("check whether timers have stopped\r\n"); esp_rom_delay_us(20 * 1000); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value)); printf("get raw count of gptimer %d: %llu\r\n", i, value); // convert the raw count to us @@ -124,11 +124,11 @@ TEST_CASE("gptimer_wallclock_with_various_clock_sources", "[gptimer]") TEST_ASSERT_UINT_WITHIN(600, 40000, value); //same 200 for cpu time } printf("disable timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); } printf("delete timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_del_timer(timers[i])); } } @@ -163,8 +163,8 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_UP, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); } @@ -174,7 +174,7 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]") gptimer_alarm_config_t alarm_config = {}; printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { alarm_config.alarm_count = 100000 * (i + 1); TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); @@ -182,38 +182,38 @@ TEST_CASE("gptimer_stop_on_alarm", "[gptimer]") TEST_ESP_OK(gptimer_start(timers[i])); printf("alarm value for gptimer %d: %llu\r\n", i, alarm_config.alarm_count); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000))); } printf("check whether the timers have stopped in the ISR\r\n"); vTaskDelay(pdMS_TO_TICKS(20)); unsigned long long value = 0; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value)); printf("get raw count of gptimer %d: %llu\r\n", i, value); TEST_ASSERT_UINT_WITHIN(GPTIMER_STOP_ON_ALARM_COUNT_DELTA, 100000 * (i + 1), value); } printf("restart timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { alarm_config.alarm_count = 100000 * (i + 1); // reset counter value to zero TEST_ESP_OK(gptimer_set_raw_count(timers[i], 0)); TEST_ESP_OK(gptimer_start(timers[i])); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000))); } printf("check whether the timers have stopped in the ISR\r\n"); vTaskDelay(pdMS_TO_TICKS(20)); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_get_raw_count(timers[i], &value)); printf("get raw count of gptimer %d: %llu\r\n", i, value); TEST_ASSERT_UINT_WITHIN(GPTIMER_STOP_ON_ALARM_COUNT_DELTA, 100000 * (i + 1), value); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } @@ -249,8 +249,8 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_UP, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); } @@ -264,7 +264,7 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]") }; printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); TEST_ESP_OK(gptimer_enable(timers[i])); @@ -277,7 +277,7 @@ TEST_CASE("gptimer_auto_reload_on_alarm", "[gptimer]") TEST_ESP_OK(gptimer_stop(timers[i])); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } @@ -313,8 +313,8 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_UP, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { timer_config.intr_priority = i % 3 + 1; // test different priorities TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); } @@ -328,7 +328,7 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]") }; printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); TEST_ESP_OK(gptimer_enable(timers[i])); @@ -344,14 +344,14 @@ TEST_CASE("gptimer_one_shot_alarm", "[gptimer]") } printf("restart timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_start(timers[i])); // alarm should be triggered immediately as the counter value has across the target alarm value already TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, 0)); TEST_ESP_OK(gptimer_stop(timers[i])); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } @@ -379,8 +379,8 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_UP, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); } @@ -391,7 +391,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]") .alarm_count = 100000, // initial alarm count, 100ms }; printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); TEST_ESP_OK(gptimer_enable(timers[i])); @@ -406,7 +406,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]") } printf("restart timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_start(timers[i])); // check the alarm event for multiple times TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(500))); @@ -417,7 +417,7 @@ TEST_CASE("gptimer_update_alarm_dynamically", "[gptimer]") TEST_ASSERT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(500))); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } @@ -453,8 +453,8 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_DOWN, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); TEST_ESP_OK(gptimer_set_raw_count(timers[i], 200000)); } @@ -468,7 +468,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]") .flags.auto_reload_on_alarm = true, }; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); TEST_ESP_OK(gptimer_enable(timers[i])); @@ -480,7 +480,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]") } printf("restart gptimer with previous configuration\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_start(timers[i])); // check twice, as it's a period event TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000))); @@ -488,7 +488,7 @@ TEST_CASE("gptimer_count_down_reload", "[gptimer]") TEST_ESP_OK(gptimer_stop(timers[i])); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } @@ -513,14 +513,14 @@ TEST_CASE("gptimer_overflow", "[gptimer]") .clk_src = GPTIMER_CLK_SRC_DEFAULT, .direction = GPTIMER_COUNT_UP, }; - gptimer_handle_t timers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + gptimer_handle_t timers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&timer_config, &timers[i])); } -#if SOC_TIMER_GROUP_COUNTER_BIT_WIDTH == 64 +#if SOC_MODULE_ATTR(GPTIMER, COUNTER_BIT_WIDTH) == 64 uint64_t reload_at = UINT64_MAX - 100000; #else - uint64_t reload_at = (1ULL << SOC_TIMER_GROUP_COUNTER_BIT_WIDTH) - 100000; + uint64_t reload_at = (1ULL << SOC_MODULE_ATTR(GPTIMER, COUNTER_BIT_WIDTH)) - 100000; #endif gptimer_event_callbacks_t cbs = { .on_alarm = test_gptimer_overflow_reload_callback, @@ -533,7 +533,7 @@ TEST_CASE("gptimer_overflow", "[gptimer]") // The counter should start from [COUNTER_MAX-100000] and overflows to [0] and continue, then reached to alarm value [100000], reloaded to [COUNTER_MAX-100000] automatically // thus the period should be 200ms printf("start timers\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_set_alarm_action(timers[i], &alarm_config)); TEST_ESP_OK(gptimer_register_event_callbacks(timers[i], &cbs, task_handle)); // we start from the reload value @@ -544,7 +544,7 @@ TEST_CASE("gptimer_overflow", "[gptimer]") TEST_ESP_OK(gptimer_stop(timers[i])); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_disable(timers[i])); TEST_ESP_OK(gptimer_del_timer(timers[i])); } diff --git a/components/esp_gdbstub/src/gdbstub.c b/components/esp_gdbstub/src/gdbstub.c index d3c7097652..c91476f20d 100644 --- a/components/esp_gdbstub/src/gdbstub.c +++ b/components/esp_gdbstub/src/gdbstub.c @@ -120,10 +120,10 @@ static wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT(); static bool rtc_wdt_ctx_enabled = false; static wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0}; static bool wdt0_context_enabled = false; -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 static wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; static bool wdt1_context_enabled = false; -#endif // SOC_TIMER_GROUPS +#endif // SOC_MODULE_ATTR(TIMG, INST_NUM) /** * Disable all enabled WDTs @@ -131,7 +131,7 @@ static bool wdt1_context_enabled = false; static inline void disable_all_wdts(void) { wdt0_context_enabled = wdt_hal_is_enabled(&wdt0_context); - #if SOC_TIMER_GROUPS >= 2 + #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 wdt1_context_enabled = wdt_hal_is_enabled(&wdt1_context); #endif rtc_wdt_ctx_enabled = wdt_hal_is_enabled(&rtc_wdt_ctx); @@ -144,7 +144,7 @@ static inline void disable_all_wdts(void) wdt_hal_write_protect_enable(&wdt0_context); } - #if SOC_TIMER_GROUPS >= 2 + #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 /* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */ if (true == wdt1_context_enabled) { wdt_hal_write_protect_disable(&wdt1_context); @@ -152,7 +152,7 @@ static inline void disable_all_wdts(void) wdt_hal_feed(&wdt1_context); wdt_hal_write_protect_enable(&wdt1_context); } - #endif // SOC_TIMER_GROUPS >= 2 + #endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 if (true == rtc_wdt_ctx_enabled) { wdt_hal_write_protect_disable(&rtc_wdt_ctx); @@ -173,14 +173,14 @@ static inline void enable_all_wdts(void) wdt_hal_enable(&wdt0_context); wdt_hal_write_protect_enable(&wdt0_context); } - #if SOC_TIMER_GROUPS >= 2 + #if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 /* Interrupt WDT is the Main Watchdog Timer of Timer Group 1 */ if (false == wdt1_context_enabled) { wdt_hal_write_protect_disable(&wdt1_context); wdt_hal_enable(&wdt1_context); wdt_hal_write_protect_enable(&wdt1_context); } - #endif // SOC_TIMER_GROUPS >= 2 + #endif // SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 if (false == rtc_wdt_ctx_enabled) { wdt_hal_write_protect_disable(&rtc_wdt_ctx); diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index e9498800d5..c737d1c815 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -576,7 +576,7 @@ static SLEEP_FN_ATTR void suspend_timers(uint32_t sleep_flags) { if (!(sleep_flags & RTC_SLEEP_PD_XTAL)) { #if SOC_SLEEP_TGWDT_STOP_WORKAROUND /* If timegroup implemented task watchdog or interrupt watchdog is running, we have to stop it. */ - for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) { + for (uint32_t tg_num = 0; tg_num < SOC_MODULE_ATTR(TIMG, INST_NUM); ++tg_num) { if (mwdt_ll_check_if_enabled(TIMER_LL_GET_HW(tg_num))) { mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num)); mwdt_ll_disable(TIMER_LL_GET_HW(tg_num)); @@ -602,7 +602,7 @@ static SLEEP_FN_ATTR void resume_timers(uint32_t sleep_flags) { } #endif #if SOC_SLEEP_TGWDT_STOP_WORKAROUND - for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) { + for (uint32_t tg_num = 0; tg_num < SOC_MODULE_ATTR(TIMG, INST_NUM); ++tg_num) { if (s_stopped_tgwdt_bmap & BIT(tg_num)) { mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num)); mwdt_ll_enable(TIMER_LL_GET_HW(tg_num)); diff --git a/components/esp_hw_support/sleep_system_peripheral.c b/components/esp_hw_support/sleep_system_peripheral.c index bd8297654f..a5fe904443 100644 --- a/components/esp_hw_support/sleep_system_peripheral.c +++ b/components/esp_hw_support/sleep_system_peripheral.c @@ -8,9 +8,10 @@ #include #include "sdkconfig.h" -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "soc/system_periph_retention.h" #include "soc/uart_periph.h" +#include "soc/timer_periph.h" #include "esp_sleep.h" #include "esp_log.h" @@ -188,7 +189,7 @@ bool peripheral_domain_pd_allowed(void) #if SOC_TIMER_SUPPORT_SLEEP_RETENTION mask.bitmap[SLEEP_RETENTION_MODULE_TG0_TIMER0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_TIMER0 % 32); mask.bitmap[SLEEP_RETENTION_MODULE_TG1_TIMER0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_TIMER0 % 32); -#if (SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1) +#if SOC_GPTIMER_ATTR(TIMERS_PER_TIMG) > 1 mask.bitmap[SLEEP_RETENTION_MODULE_TG0_TIMER1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_TIMER1 % 32); mask.bitmap[SLEEP_RETENTION_MODULE_TG1_TIMER1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_TIMER1 % 32); #endif diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_intr_alloc.c b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_intr_alloc.c index 2dfbe47e16..fb7ab80207 100644 --- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_intr_alloc.c +++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_intr_alloc.c @@ -18,7 +18,7 @@ #include "unity.h" #include "esp_intr_alloc.h" #include "driver/gptimer.h" -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "soc/system_intr.h" #if SOC_GPSPI_SUPPORTED #include "soc/spi_periph.h" @@ -28,7 +28,7 @@ #include "esp_private/periph_ctrl.h" #include "esp_private/gptimer.h" -#if SOC_GPTIMER_SUPPORTED +#if SOC_HAS(GPTIMER) static bool on_timer_alarm(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx) { volatile int *count = (volatile int *)user_ctx; @@ -38,9 +38,9 @@ static bool on_timer_alarm(gptimer_handle_t timer, const gptimer_alarm_event_dat static void timer_test(int flags) { - static int count[SOC_TIMER_GROUP_TOTAL_TIMERS] = {0}; - gptimer_handle_t gptimers[SOC_TIMER_GROUP_TOTAL_TIMERS]; - intr_handle_t inth[SOC_TIMER_GROUP_TOTAL_TIMERS]; + static int count[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)] = {0}; + gptimer_handle_t gptimers[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; + intr_handle_t inth[SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL)]; gptimer_config_t config = { .clk_src = GPTIMER_CLK_SRC_DEFAULT, @@ -48,7 +48,7 @@ static void timer_test(int flags) .resolution_hz = 1000000, .flags.intr_shared = (flags & ESP_INTR_FLAG_SHARED) == ESP_INTR_FLAG_SHARED, }; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_new_timer(&config, &gptimers[i])); } gptimer_alarm_config_t alarm_config = { @@ -60,7 +60,7 @@ static void timer_test(int flags) .on_alarm = on_timer_alarm, }; - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_register_event_callbacks(gptimers[i], &cbs, &count[i])); alarm_config.alarm_count += 10000 * i; TEST_ESP_OK(gptimer_set_alarm_action(gptimers[i], &alarm_config)); @@ -73,39 +73,39 @@ static void timer_test(int flags) if ((flags & ESP_INTR_FLAG_SHARED)) { /* Check that the allocated interrupts are actually shared */ int intr_num = esp_intr_get_intno(inth[0]); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ASSERT_EQUAL(intr_num, esp_intr_get_intno(inth[i])); } } vTaskDelay(1000 / portTICK_PERIOD_MS); printf("Timer values after 1 sec:"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { printf(" %d", count[i]); } printf("\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ASSERT_NOT_EQUAL(0, count[i]); } printf("Disabling timers' interrupt...\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { esp_intr_disable(inth[i]); count[i] = 0; } vTaskDelay(1000 / portTICK_PERIOD_MS); printf("Timer values after 1 sec:"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { printf(" %d", count[i]); } printf("\r\n"); - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ASSERT_EQUAL(0, count[i]); } - for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) { + for (int i = 0; i < SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL); i++) { TEST_ESP_OK(gptimer_stop(gptimers[i])); TEST_ESP_OK(gptimer_disable(gptimers[i])); TEST_ESP_OK(gptimer_del_timer(gptimers[i])); @@ -121,7 +121,7 @@ TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]") { timer_test(ESP_INTR_FLAG_SHARED); } -#endif //SOC_GPTIMER_SUPPORTED +#endif // SOC_HAS(GPTIMER) void static test_isr(void*arg) { diff --git a/components/esp_rom/patches/esp_rom_wdt.c b/components/esp_rom/patches/esp_rom_wdt.c index 7770911a46..e69341bcc2 100644 --- a/components/esp_rom/patches/esp_rom_wdt.c +++ b/components/esp_rom/patches/esp_rom_wdt.c @@ -23,7 +23,7 @@ void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescale if (wdt_inst == WDT_MWDT0) { hal->mwdt_dev = &TIMERG0; } -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 else if (wdt_inst == WDT_MWDT1) { hal->mwdt_dev = &TIMERG1; } diff --git a/components/esp_system/int_wdt.c b/components/esp_system/int_wdt.c index 9b53973842..e9c3b01e1c 100644 --- a/components/esp_system/int_wdt.c +++ b/components/esp_system/int_wdt.c @@ -29,7 +29,7 @@ #include "esp_private/sleep_retention.h" #endif -#if SOC_TIMER_GROUPS > 1 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) > 1 /* If we have two hardware timer groups, use the second one for interrupt watchdog. */ #define WDT_LEVEL_INTR_SOURCE SYS_TG1_WDT_INTR_SOURCE @@ -50,7 +50,7 @@ #define IWDT_PERIPH PERIPH_TIMG0_MODULE #define IWDT_TIMER_GROUP 0 -#endif // SOC_TIMER_GROUPS > 1 +#endif // SOC_MODULE_ATTR(TIMG, INST_NUM) > 1 #if CONFIG_ESP_INT_WDT #if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_MWDT_SUPPORT_SLEEP_RETENTION diff --git a/components/esp_system/panic.c b/components/esp_system/panic.c index 52a9d45624..8a61bc4acf 100644 --- a/components/esp_system/panic.c +++ b/components/esp_system/panic.c @@ -192,12 +192,12 @@ void esp_panic_handler_disable_timg_wdts(void) wdt_hal_disable(&wdt0_context); wdt_hal_write_protect_enable(&wdt0_context); -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; wdt_hal_write_protect_disable(&wdt1_context); wdt_hal_disable(&wdt1_context); wdt_hal_write_protect_enable(&wdt1_context); -#endif /* SOC_TIMER_GROUPS >= 2 */ +#endif /* SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 */ } /* This function enables the RTC WDT with the given timeout in milliseconds */ @@ -232,7 +232,7 @@ void esp_panic_handler_feed_wdts(void) wdt_hal_write_protect_enable(&wdt0_context); } -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 // Feed Timer Group 1 WDT wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; if (wdt_hal_is_enabled(&wdt1_context)) { @@ -240,7 +240,7 @@ void esp_panic_handler_feed_wdts(void) wdt_hal_feed(&wdt1_context); wdt_hal_write_protect_enable(&wdt1_context); } -#endif /* SOC_TIMER_GROUPS >= 2 */ +#endif /* SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 */ // Feed RTC WDT if (wdt_hal_is_enabled(&rtc_wdt_ctx)) { diff --git a/components/hal/esp32/include/hal/timer_ll.h b/components/hal/esp32/include/hal/timer_ll.h index 737b3c5a78..a50ce38770 100644 --- a/components/hal/esp32/include/hal/timer_ll.h +++ b/components/hal/esp32/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support APB as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1 + /** * @brief Enable the bus clock for timer group module * diff --git a/components/hal/esp32c3/include/hal/timer_ll.h b/components/hal/esp32c3/include/hal/timer_ll.h index 396538c962..06a02c72c8 100644 --- a/components/hal/esp32c3/include/hal/timer_ll.h +++ b/components/hal/esp32c3/include/hal/timer_ll.h @@ -22,8 +22,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support APB as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1 + /** * @brief Enable the bus clock for timer group module * diff --git a/components/hal/esp32c5/include/hal/timer_ll.h b/components/hal/esp32c5/include/hal/timer_ll.h index af72dbf477..d4c0d11101 100644 --- a/components/hal/esp32c5/include/hal/timer_ll.h +++ b/components/hal/esp32c5/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 + #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ [GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \ diff --git a/components/hal/esp32c6/include/hal/timer_ll.h b/components/hal/esp32c6/include/hal/timer_ll.h index 1033b56d16..f75f600a0b 100644 --- a/components/hal/esp32c6/include/hal/timer_ll.h +++ b/components/hal/esp32c6/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 + #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ [GPTIMER_ETM_TASK_START_COUNT] = TIMER0_TASK_CNT_START_TIMER0, \ diff --git a/components/hal/esp32c61/include/hal/timer_ll.h b/components/hal/esp32c61/include/hal/timer_ll.h index 3252c6c63e..e729081f53 100644 --- a/components/hal/esp32c61/include/hal/timer_ll.h +++ b/components/hal/esp32c61/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 + #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ [GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \ diff --git a/components/hal/esp32h21/include/hal/timer_ll.h b/components/hal/esp32h21/include/hal/timer_ll.h index 22a7a54d9c..693bc82513 100644 --- a/components/hal/esp32h21/include/hal/timer_ll.h +++ b/components/hal/esp32h21/include/hal/timer_ll.h @@ -23,8 +23,12 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) -#define TIMER_LL_SLEEP_RETENTION_MODULE_ID(group_id) ((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_TIMER: SLEEP_RETENTION_MODULE_TG1_TIMER) + +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ diff --git a/components/hal/esp32h4/include/hal/timer_ll.h b/components/hal/esp32h4/include/hal/timer_ll.h index 7da96d0b0b..78714109dd 100644 --- a/components/hal/esp32h4/include/hal/timer_ll.h +++ b/components/hal/esp32h4/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 + #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ [GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \ diff --git a/components/hal/esp32p4/include/hal/timer_ll.h b/components/hal/esp32p4/include/hal/timer_ll.h index b76902ab15..1a4f933747 100644 --- a/components/hal/esp32p4/include/hal/timer_ll.h +++ b/components/hal/esp32p4/include/hal/timer_ll.h @@ -23,8 +23,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support RC_FAST as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_RC_FAST 1 + #define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ (uint32_t[2][2][GPTIMER_ETM_TASK_MAX]){ \ { \ diff --git a/components/hal/esp32s2/include/hal/timer_ll.h b/components/hal/esp32s2/include/hal/timer_ll.h index 54c9c03a90..1d462ee868 100644 --- a/components/hal/esp32s2/include/hal/timer_ll.h +++ b/components/hal/esp32s2/include/hal/timer_ll.h @@ -22,8 +22,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support APB as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1 + /** * @brief Enable the bus clock for timer group module * diff --git a/components/hal/esp32s3/include/hal/timer_ll.h b/components/hal/esp32s3/include/hal/timer_ll.h index e838fa011a..fc24c28c2a 100644 --- a/components/hal/esp32s3/include/hal/timer_ll.h +++ b/components/hal/esp32s3/include/hal/timer_ll.h @@ -22,8 +22,13 @@ extern "C" { // Get timer group register base address with giving group number #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) + +// Get alarm interrupt mask with the given timer ID #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) +// Support APB as function clock +#define TIMER_LL_FUNC_CLOCK_SUPPORT_APB 1 + /** * @brief Enable the bus clock for timer group module * diff --git a/components/soc/esp32/timer_periph.c b/components/soc/esp32/timer_periph.c index 72c9ca2c8c..68beb97bd6 100644 --- a/components/soc/esp32/timer_periph.c +++ b/components/soc/esp32/timer_periph.c @@ -4,32 +4,31 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/soc.h" #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - [1] = "TIMG0T1", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG0_T1_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, }, [1] = { - .module_name = { - [0] = "TIMG1T0", - [1] = "TIMG1T1", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG1_T1_LEVEL_INTR_SOURCE, - } - } + .module_name = "TIMG0T1", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T1_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, + }, + [1] = { + .module_name = "TIMG1T1", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T1_LEVEL_INTR_SOURCE, + }, } }; diff --git a/components/soc/esp32c2/timer_periph.c b/components/soc/esp32c2/timer_periph.c index 1e477f66d6..6e72fbcf84 100644 --- a/components/soc/esp32c2/timer_periph.c +++ b/components/soc/esp32c2/timer_periph.c @@ -1,21 +1,17 @@ /* - * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[1][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, }, } }; diff --git a/components/soc/esp32c3/timer_periph.c b/components/soc/esp32c3/timer_periph.c index 77049152ec..c17270060f 100644 --- a/components/soc/esp32c3/timer_periph.c +++ b/components/soc/esp32c3/timer_periph.c @@ -6,25 +6,19 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - } - } } }; diff --git a/components/soc/esp32c5/timer_periph.c b/components/soc/esp32c5/timer_periph.c index cf16e20387..252808fbf7 100644 --- a/components/soc/esp32c5/timer_periph.c +++ b/components/soc/esp32c5/timer_periph.c @@ -6,26 +6,20 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - } - } } }; @@ -117,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, diff --git a/components/soc/esp32c5/wdt_periph.c b/components/soc/esp32c5/wdt_periph.c index 8d082d6e92..9cb2b89f4b 100644 --- a/components/soc/esp32c5/wdt_periph.c +++ b/components/soc/esp32c5/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32c6/timer_periph.c b/components/soc/esp32c6/timer_periph.c index cf16e20387..252808fbf7 100644 --- a/components/soc/esp32c6/timer_periph.c +++ b/components/soc/esp32c6/timer_periph.c @@ -6,26 +6,20 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - } - } } }; @@ -117,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, diff --git a/components/soc/esp32c6/wdt_periph.c b/components/soc/esp32c6/wdt_periph.c index 8d082d6e92..9cb2b89f4b 100644 --- a/components/soc/esp32c6/wdt_periph.c +++ b/components/soc/esp32c6/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32c61/timer_periph.c b/components/soc/esp32c61/timer_periph.c index d925e4474b..76add56659 100644 --- a/components/soc/esp32c61/timer_periph.c +++ b/components/soc/esp32c61/timer_periph.c @@ -6,26 +6,20 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_INTR_SOURCE, - } - } } }; @@ -117,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, diff --git a/components/soc/esp32c61/wdt_periph.c b/components/soc/esp32c61/wdt_periph.c index 8d082d6e92..9cb2b89f4b 100644 --- a/components/soc/esp32c61/wdt_periph.c +++ b/components/soc/esp32c61/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32h2/timer_periph.c b/components/soc/esp32h2/timer_periph.c index cf16e20387..252808fbf7 100644 --- a/components/soc/esp32h2/timer_periph.c +++ b/components/soc/esp32h2/timer_periph.c @@ -6,26 +6,20 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - } - } } }; @@ -117,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, diff --git a/components/soc/esp32h2/wdt_periph.c b/components/soc/esp32h2/wdt_periph.c index 8d082d6e92..9cb2b89f4b 100644 --- a/components/soc/esp32h2/wdt_periph.c +++ b/components/soc/esp32h2/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32h21/timer_periph.c b/components/soc/esp32h21/timer_periph.c index 30062d0d1b..91b7a2f896 100644 --- a/components/soc/esp32h21/timer_periph.c +++ b/components/soc/esp32h21/timer_periph.c @@ -6,30 +6,23 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_INTR_SOURCE, - } - } } }; -#if SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION /* Registers in retention context: * TIMG_T0CONFIG_REG * TIMG_T0ALARMLO_REG @@ -118,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, @@ -134,4 +127,3 @@ const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS } }, }; -#endif //SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION diff --git a/components/soc/esp32h21/wdt_periph.c b/components/soc/esp32h21/wdt_periph.c index bfbaabb4aa..608e227eb7 100644 --- a/components/soc/esp32h21/wdt_periph.c +++ b/components/soc/esp32h21/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32h4/timer_periph.c b/components/soc/esp32h4/timer_periph.c index 30062d0d1b..91b7a2f896 100644 --- a/components/soc/esp32h4/timer_periph.c +++ b/components/soc/esp32h4/timer_periph.c @@ -6,30 +6,23 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][1] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_INTR_SOURCE, }, - [1] = { - .module_name = { - [0] = "TIMG1T0", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_INTR_SOURCE, - } - } } }; -#if SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION /* Registers in retention context: * TIMG_T0CONFIG_REG * TIMG_T0ALARMLO_REG @@ -118,7 +111,7 @@ const regdma_entries_config_t tg1_timer_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][1] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, @@ -134,4 +127,3 @@ const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS } }, }; -#endif //SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION diff --git a/components/soc/esp32h4/wdt_periph.c b/components/soc/esp32h4/wdt_periph.c index 3d9932ed10..175f62a5aa 100644 --- a/components/soc/esp32h4/wdt_periph.c +++ b/components/soc/esp32h4/wdt_periph.c @@ -29,7 +29,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY(2) }, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32p4/timer_periph.c b/components/soc/esp32p4/timer_periph.c index 1a0b55ae56..bbb2f9b1f4 100644 --- a/components/soc/esp32p4/timer_periph.c +++ b/components/soc/esp32p4/timer_periph.c @@ -6,30 +6,30 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - [1] = "TIMG0T1", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_INTR_SOURCE, - [1] = ETS_TG0_T1_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_INTR_SOURCE, }, [1] = { - .module_name = { - [0] = "TIMG1T0", - [1] = "TIMG1T1", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_INTR_SOURCE, - [1] = ETS_TG1_T1_INTR_SOURCE, - } - } + .module_name = "TIMG0T1", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T1_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_INTR_SOURCE, + }, + [1] = { + .module_name = "TIMG1T1", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T1_INTR_SOURCE, + }, } }; @@ -213,7 +213,7 @@ const regdma_entries_config_t tg1_timer1_regdma_entries[] = { }, }; -const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP] = { +const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[2][2] = { [0] = { [0] = { .module = SLEEP_RETENTION_MODULE_TG0_TIMER0, diff --git a/components/soc/esp32p4/wdt_periph.c b/components/soc/esp32p4/wdt_periph.c index 0f636cc6fe..01438b4a93 100644 --- a/components/soc/esp32p4/wdt_periph.c +++ b/components/soc/esp32p4/wdt_periph.c @@ -26,7 +26,7 @@ static const regdma_entries_config_t tg1_wdt_regs_retention[] = { [5] = { .config = REGDMA_LINK_WRITE_INIT(REGDMA_TG1_WDT_LINK(0x05), TIMG_WDTWPROTECT_REG(1), 0, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0)}, }; -const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS] = { +const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = { [0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)}, [1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)}, }; diff --git a/components/soc/esp32s2/timer_periph.c b/components/soc/esp32s2/timer_periph.c index 58486e2937..68beb97bd6 100644 --- a/components/soc/esp32s2/timer_periph.c +++ b/components/soc/esp32s2/timer_periph.c @@ -6,29 +6,29 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - [1] = "TIMG0T1", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG0_T1_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, }, [1] = { - .module_name = { - [0] = "TIMG1T0", - [1] = "TIMG1T1", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG1_T1_LEVEL_INTR_SOURCE, - } - } + .module_name = "TIMG0T1", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T1_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, + }, + [1] = { + .module_name = "TIMG1T1", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T1_LEVEL_INTR_SOURCE, + }, } }; diff --git a/components/soc/esp32s3/timer_periph.c b/components/soc/esp32s3/timer_periph.c index 58486e2937..68beb97bd6 100644 --- a/components/soc/esp32s3/timer_periph.c +++ b/components/soc/esp32s3/timer_periph.c @@ -6,29 +6,29 @@ #include "soc/timer_periph.h" -const timer_group_signal_conn_t timer_group_periph_signals = { - .groups = { +const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[2][2] = { + [0] = { [0] = { - .module_name = { - [0] = "TIMG0T0", - [1] = "TIMG0T1", - }, - .module = PERIPH_TIMG0_MODULE, - .timer_irq_id = { - [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG0_T1_LEVEL_INTR_SOURCE, - } + .module_name = "TIMG0T0", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T0_LEVEL_INTR_SOURCE, }, [1] = { - .module_name = { - [0] = "TIMG1T0", - [1] = "TIMG1T1", - }, - .module = PERIPH_TIMG1_MODULE, - .timer_irq_id = { - [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE, - [1] = ETS_TG1_T1_LEVEL_INTR_SOURCE, - } - } + .module_name = "TIMG0T1", + .parent_module = PERIPH_TIMG0_MODULE, + .irq_id = ETS_TG0_T1_LEVEL_INTR_SOURCE, + }, + }, + [1] = { + [0] = { + .module_name = "TIMG1T0", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T0_LEVEL_INTR_SOURCE, + }, + [1] = { + .module_name = "TIMG1T1", + .parent_module = PERIPH_TIMG1_MODULE, + .irq_id = ETS_TG1_T1_LEVEL_INTR_SOURCE, + }, } }; diff --git a/components/soc/include/soc/timer_periph.h b/components/soc/include/soc/timer_periph.h index 465f048b90..7e7b215dcd 100644 --- a/components/soc/include/soc/timer_periph.h +++ b/components/soc/include/soc/timer_periph.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,39 +7,42 @@ #pragma once #include +#include #include "soc/timer_group_reg.h" #include "soc/timer_group_struct.h" -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "soc/periph_defs.h" #include "soc/regdma.h" -#if SOC_PAU_SUPPORTED +#if SOC_HAS(PAU) #include "soc/retention_periph_defs.h" -#endif // SOC_PAU_SUPPORTED +#endif // SOC_HAS(PAU) + +// helper macros to access module attributes +#define SOC_TIMG_ATTR(_attr) SOC_MODULE_ATTR(TIMG, _attr) +#define SOC_GPTIMER_ATTR(_attr) SOC_MODULE_ATTR(GPTIMER, _attr) #ifdef __cplusplus extern "C" { #endif typedef struct { - struct { - const char *module_name[SOC_TIMER_GROUP_TIMERS_PER_GROUP]; - const periph_module_t module; // Peripheral module - const int timer_irq_id[SOC_TIMER_GROUP_TIMERS_PER_GROUP]; // interrupt source ID - } groups[SOC_TIMER_GROUPS]; -} timer_group_signal_conn_t; + const char *module_name; // Module name + const periph_module_t parent_module; // GPTimer is a submodule under the timer group + const int irq_id; // interrupt source ID +} soc_timg_gptimer_signal_desc_t; -extern const timer_group_signal_conn_t timer_group_periph_signals; +extern const soc_timg_gptimer_signal_desc_t soc_timg_gptimer_signals[SOC_TIMG_ATTR(INST_NUM)][SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)]; -#if SOC_PAU_SUPPORTED && SOC_TIMER_SUPPORT_SLEEP_RETENTION +#if SOC_HAS(PAU) typedef struct { - const periph_retention_module_t module; - const regdma_entries_config_t *regdma_entry_array; - uint32_t array_size; -} tg_timer_reg_retention_info_t; + const periph_retention_module_t module; // ID of the GPTimer as a retention module + const regdma_entries_config_t *regdma_entry_array; // Array of regdma entries for retention + const size_t array_size; // Size of the regdma_entry_array +} soc_timg_gptimer_retention_desc_t; -extern const tg_timer_reg_retention_info_t tg_timer_reg_retention_info[SOC_TIMER_GROUPS][SOC_TIMER_GROUP_TIMERS_PER_GROUP]; -#endif // SOC_TIMER_SUPPORT_SLEEP_RETENTION +extern const soc_timg_gptimer_retention_desc_t soc_timg_gptimer_retention_infos[SOC_TIMG_ATTR(INST_NUM)][SOC_GPTIMER_ATTR(TIMERS_PER_TIMG)]; +#endif // SOC_HAS(PAU) #ifdef __cplusplus } diff --git a/components/soc/include/soc/wdt_periph.h b/components/soc/include/soc/wdt_periph.h index b2f1133f2b..0787be8818 100644 --- a/components/soc/include/soc/wdt_periph.h +++ b/components/soc/include/soc/wdt_periph.h @@ -9,7 +9,7 @@ #include #include "soc/timer_group_reg.h" #include "soc/timer_group_struct.h" -#include "soc/soc_caps.h" +#include "soc/soc_caps_full.h" #include "soc/periph_defs.h" #include "soc/regdma.h" @@ -26,7 +26,7 @@ typedef struct { uint32_t link_num; } tg_reg_ctx_link_t; -extern const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_TIMER_GROUPS]; +extern const tg_reg_ctx_link_t tg_wdt_regs_retention[SOC_MODULE_ATTR(TIMG, INST_NUM)]; #endif // SOC_MWDT_SUPPORT_SLEEP_RETENTION #ifdef __cplusplus diff --git a/examples/peripherals/.build-test-rules.yml b/examples/peripherals/.build-test-rules.yml index c803db1daf..0c2d1c4bf4 100644 --- a/examples/peripherals/.build-test-rules.yml +++ b/examples/peripherals/.build-test-rules.yml @@ -486,7 +486,7 @@ examples/peripherals/timer_group/gptimer_capture_hc_sr04: examples/peripherals/timer_group/wiegand_interface: disable: - - if: SOC_GPTIMER_SUPPORTED != 1 or SOC_TIMER_GROUP_TOTAL_TIMERS < 2 + - if: SOC_GPTIMER_SUPPORTED != 1 or IDF_TARGET in ["esp32c2"] depends_components: - esp_driver_gptimer diff --git a/tools/test_apps/system/memprot/main/esp32c3/test_panic.c b/tools/test_apps/system/memprot/main/esp32c3/test_panic.c index 83f6eb5ca5..5a6485be76 100644 --- a/tools/test_apps/system/memprot/main/esp32c3/test_panic.c +++ b/tools/test_apps/system/memprot/main/esp32c3/test_panic.c @@ -22,7 +22,7 @@ void __real_esp_cpu_stall(int core_id); static void disable_all_wdts(void) { wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0}; -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; #endif @@ -32,7 +32,7 @@ static void disable_all_wdts(void) wdt_hal_disable(&wdt0_context); wdt_hal_write_protect_enable(&wdt0_context); -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 //Interrupt WDT is the Main Watchdog Timer of Timer Group 1 wdt_hal_write_protect_disable(&wdt1_context); wdt_hal_disable(&wdt1_context); diff --git a/tools/test_apps/system/memprot/main/esp32s2/test_panic.c b/tools/test_apps/system/memprot/main/esp32s2/test_panic.c index c6acdba0cb..9c7ee6058d 100644 --- a/tools/test_apps/system/memprot/main/esp32s2/test_panic.c +++ b/tools/test_apps/system/memprot/main/esp32s2/test_panic.c @@ -20,7 +20,7 @@ void __real_esp_cpu_stall(int core_id); static void disable_all_wdts(void) { wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0}; -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; #endif @@ -30,7 +30,7 @@ static void disable_all_wdts(void) wdt_hal_disable(&wdt0_context); wdt_hal_write_protect_enable(&wdt0_context); -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 //Interrupt WDT is the Main Watchdog Timer of Timer Group 1 wdt_hal_write_protect_disable(&wdt1_context); wdt_hal_disable(&wdt1_context); diff --git a/tools/test_apps/system/memprot/main/esp32s3/test_panic.c b/tools/test_apps/system/memprot/main/esp32s3/test_panic.c index 1929d9ccce..fb9c19d955 100644 --- a/tools/test_apps/system/memprot/main/esp32s3/test_panic.c +++ b/tools/test_apps/system/memprot/main/esp32s3/test_panic.c @@ -20,7 +20,7 @@ void __real_esp_cpu_stall(int core_id); static void disable_all_wdts(void) { wdt_hal_context_t wdt0_context = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0}; -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 wdt_hal_context_t wdt1_context = {.inst = WDT_MWDT1, .mwdt_dev = &TIMERG1}; #endif @@ -30,7 +30,7 @@ static void disable_all_wdts(void) wdt_hal_disable(&wdt0_context); wdt_hal_write_protect_enable(&wdt0_context); -#if SOC_TIMER_GROUPS >= 2 +#if SOC_MODULE_ATTR(TIMG, INST_NUM) >= 2 //Interrupt WDT is the Main Watchdog Timer of Timer Group 1 wdt_hal_write_protect_disable(&wdt1_context); wdt_hal_disable(&wdt1_context);