soc: ll and hal for sleep related code

components/soc/src/esp32s2/include/hal/rtc_cntl_ll.h

@@ -0,0 +1,58 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
+{
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
+
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+    SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+}
+
+static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
+{
+    return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
+}
+
+static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
+{
+    REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
+}
+
+static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
+{
+    REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
+}
+
+static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
+{
+    SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S);
+}
+
+#ifdef __cplusplus
+}
+#endif

components/soc/src/esp32s2/include/hal/rtc_io_ll.h

@@ -354,6 +354,14 @@ static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
     CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
 }
 
+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
+    // Set level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            level , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif

components/soc/src/esp32s2/include/hal/soc_ll.h

@@ -16,6 +16,7 @@
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/rtc.h"
 
 #ifdef __cplusplus
 extern "C" {