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Merge branch 'fix/newlib-asm-inlining-issue' into 'master'

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fix(newlib): fix riscv asm inlining for mem functions

See merge request espressif/esp-idf!41623
This commit is contained in:
Alexey Lapshin
2025-09-19 06:17:04 +04:00
parent a3bf1b1a09 3d056ad1e2
commit 0c00523235
2 changed files with 9 additions and 9 deletions
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2
components/esp_libc/src/port/riscv/memcpy.c
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@@ -134,7 +134,7 @@ small:
"addi %1, %1, 4\n" // lb++;
"addi %2, %2, 4\n" // la++;
"sw %0, -4(%2)\n" // *(la-1) = src0;
: "=r"(src0), "+r"(lb), "+r"(la)
: "=&r"(src0), "+r"(lb), "+r"(la)
:: "memory");
}

16
components/esp_libc/src/port/riscv/memmove.c
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@@ -45,7 +45,7 @@ memmove(void *dst_void,
"addi %2, %2, -4\n" // aligned_dst--;
"addi %3, %3, -4\n" // length -= LITTLE_BLOCK_SIZE;
"sw %0, 0(%2)\n" // aligned_dst = src0;
: "=r"(src0), "+r"(aligned_src), "+r"(aligned_dst), "+r"(length)
: "=&r"(src0), "+r"(aligned_src), "+r"(aligned_dst), "+r"(length)
:: "memory");
}
@@ -122,13 +122,13 @@ memmove(void *dst_void,
*/
long src0;
/* DIG-694: need at least 2 instructions between lw and sw */
asm volatile("lw %0, 0(%4)\n" // long src0 = *aligned_src;
"addi %1, %4, 4\n" // aligned_src++;
"addi %2, %5, 4\n" // aligned_dst++;
"addi %3, %6, -4\n" // length -= LITTLE_BLOCK_SIZE;
"sw %0, -4(%5)\n" // *(aligned_dst-1) = src0;
: "=r"(src0), "=r"(aligned_src), "=r"(aligned_dst), "=r"(length)
: "r"(aligned_src), "r"(aligned_dst), "r"(length));
asm volatile("lw %0, 0(%1)\n" // long src0 = *aligned_src;
"addi %1, %1, 4\n" // aligned_src++;
"addi %2, %2, 4\n" // aligned_dst++;
"addi %3, %3, -4\n" // length -= LITTLE_BLOCK_SIZE;
"sw %0, -4(%2)\n" // *(aligned_dst-1) = src0;
: "=&r"(src0), "+r"(aligned_src), "+r"(aligned_dst), "+r"(length)
:: "memory");
}
/* Pick up any residual with a byte copier. */