diff --git a/components/esp_rom/linker.lf b/components/esp_rom/linker.lf
index 38af2aecdc..e8f8d2c0f1 100644
--- a/components/esp_rom/linker.lf
+++ b/components/esp_rom/linker.lf
@@ -2,7 +2,6 @@
 archive: libesp_rom.a
 entries:
     esp_rom_spiflash (noflash)
-    esp_rom_regi2c (noflash)
     if HEAP_TLSF_USE_ROM_IMPL = y && ESP_ROM_TLSF_CHECK_PATCH = y:
         esp_rom_tlsf (noflash)
     if SOC_SYSTIMER_SUPPORTED = y:
diff --git a/components/esp_rom/patches/esp_rom_regi2c_esp32c6.c b/components/esp_rom/patches/esp_rom_regi2c_esp32c6.c
index 1063ddb136..4892918a82 100644
--- a/components/esp_rom/patches/esp_rom_regi2c_esp32c6.c
+++ b/components/esp_rom/patches/esp_rom_regi2c_esp32c6.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include "esp_rom_sys.h"
+#include "esp_attr.h"
 #include "soc/lp_i2c_ana_mst_reg.h"
 #include "modem/modem_lpcon_reg.h"
 /**
@@ -69,7 +70,7 @@
 
 #define REGI2C_RTC_MAGIC_DEFAULT (0x1C610)
 
-static void regi2c_enable_block(uint8_t block)
+static IRAM_ATTR void regi2c_enable_block(uint8_t block)
 {
     REG_SET_BIT(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
     REG_SET_BIT(LP_I2C_ANA_MST_DATE_REG, LP_I2C_ANA_MST_I2C_MAT_CLK_EN);
@@ -96,7 +97,7 @@ static void regi2c_enable_block(uint8_t block)
     }
 }
 
-static void regi2c_disable_block(uint8_t block)
+static IRAM_ATTR void regi2c_disable_block(uint8_t block)
 {
     switch (block) {
     case REGI2C_BBPLL  :
@@ -122,7 +123,7 @@ static void regi2c_disable_block(uint8_t block)
     REG_CLR_BIT(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
 }
 
-uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
+uint8_t IRAM_ATTR esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
 {
     regi2c_enable_block(block);
 
@@ -136,7 +137,7 @@ uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
     regi2c_disable_block(block);
 }
 
-uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
+uint8_t IRAM_ATTR esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
 {
     assert(msb - lsb < 8);
     regi2c_enable_block(block);
@@ -152,7 +153,7 @@ uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add
     regi2c_disable_block(block);
 }
 
-void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
+void IRAM_ATTR esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
 {
     (void)host_id;
     regi2c_enable_block(block);
@@ -167,7 +168,7 @@ void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8
     regi2c_disable_block(block);
 }
 
-void esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
+void IRAM_ATTR esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
 {
     (void)host_id;
     assert(msb - lsb < 8);
diff --git a/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c b/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c
index 9425c63ec7..045c96dc09 100644
--- a/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c
+++ b/components/esp_rom/patches/esp_rom_regi2c_esp32s2.c
@@ -7,6 +7,7 @@
 #include <stdlib.h>
 #include "esp_bit_defs.h"
 #include "esp_rom_caps.h"
+#include "esp_attr.h"
 #include "sdkconfig.h"
 
 #include "soc/syscon_reg.h"
@@ -86,7 +87,7 @@
 #define I2C_SAR_ADC 0X69
 #define I2C_APLL    0X6D
 
-static void i2c_rtc_enable_block(uint8_t block)
+static IRAM_ATTR void i2c_rtc_enable_block(uint8_t block)
 {
     REG_SET_FIELD(I2C_RTC_CONFIG0, I2C_RTC_MAGIC_CTRL, I2C_RTC_MAGIC_DEFAULT);
     REG_SET_FIELD(I2C_RTC_CONFIG1, I2C_RTC_ALL_MASK, I2C_RTC_ALL_MASK_V);
@@ -107,7 +108,7 @@ static void i2c_rtc_enable_block(uint8_t block)
     }
 }
 
-uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
+uint8_t IRAM_ATTR esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
 {
     i2c_rtc_enable_block(block);
 
@@ -118,7 +119,7 @@ uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add)
     return REG_GET_FIELD(I2C_RTC_CONFIG2, I2C_RTC_DATA);
 }
 
-uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
+uint8_t IRAM_ATTR esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
 {
     assert(msb - lsb < 8);
     i2c_rtc_enable_block(block);
@@ -131,7 +132,7 @@ uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add
     return (uint8_t)((data >> lsb) & (~(0xFFFFFFFF << (msb - lsb + 1))));
 }
 
-void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
+void IRAM_ATTR esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
 {
     i2c_rtc_enable_block(block);
 
@@ -143,7 +144,7 @@ void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8
     while (REG_GET_BIT(I2C_RTC_CONFIG2, I2C_RTC_BUSY));
 }
 
-void esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
+void IRAM_ATTR esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
 {
     assert(msb - lsb < 8);
     i2c_rtc_enable_block(block);