mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-04 05:04:33 +02:00
fix(i2c_master): Fix that master multi-read failed,
Closes https://github.com/espressif/esp-idf/issues/16231
This commit is contained in:
@@ -7,6 +7,7 @@
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#include <string.h>
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#include <sys/param.h>
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#include <sys/lock.h>
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#include "esp_rom_sys.h"
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#include "sdkconfig.h"
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#include "esp_types.h"
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#include "esp_attr.h"
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@@ -291,14 +292,62 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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i2c_master->contains_read = true;
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#if !SOC_I2C_STOP_INDEPENDENT
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/*
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* If the remaining bytes is less than the hardware fifo length - 1,
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* it means the read command can be sent out in one time.
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* So, we set the status to I2C_STATUS_READ_ALL.
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*/
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if (remaining_bytes < I2C_FIFO_LEN(i2c_master->base->port_num) - 1) {
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atomic_store(&i2c_master->status, I2C_STATUS_READ_ALL);
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if (i2c_operation->hw_cmd.ack_val == I2C_ACK_VAL) {
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if (remaining_bytes != 0) {
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// If the next transaction is a read command, and the ack value is I2C_ACK_VAL,
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// that means we have multi read jobs. We send out this read command first.
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// Otherwise, we can mix with other commands, like stop.
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i2c_operation_t next_transaction = i2c_master->i2c_trans.ops[i2c_master->trans_idx + 1];
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if (next_transaction.hw_cmd.op_code == I2C_LL_CMD_READ && next_transaction.hw_cmd.ack_val == I2C_ACK_VAL) {
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portENTER_CRITICAL_SAFE(&handle->spinlock);
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i2c_master->read_len_static = i2c_master->rx_cnt;
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
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i2c_master->cmd_idx = 0;
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i2c_master->read_buf_pos = i2c_master->trans_idx;
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i2c_master->trans_idx++;
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i2c_master->i2c_trans.cmd_count--;
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portEXIT_CRITICAL_SAFE(&handle->spinlock);
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if (i2c_master->async_trans == false) {
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i2c_hal_master_trans_start(hal);
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} else {
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i2c_master->async_break = true;
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}
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} else {
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portENTER_CRITICAL_SAFE(&handle->spinlock);
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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i2c_master->read_len_static = i2c_master->rx_cnt;
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i2c_master->cmd_idx++;
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}
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i2c_master->read_buf_pos = i2c_master->trans_idx;
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i2c_master->trans_idx++;
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i2c_master->i2c_trans.cmd_count--;
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portEXIT_CRITICAL_SAFE(&handle->spinlock);
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if (i2c_master->async_trans == false) {
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if (xPortInIsrContext()) {
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xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
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} else {
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xSemaphoreGive(i2c_master->cmd_semphr);
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}
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}
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}
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} else {
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i2c_master->trans_idx++;
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i2c_master->i2c_trans.cmd_count--;
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if (i2c_master->async_trans == false) {
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if (xPortInIsrContext()) {
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xSemaphoreGiveFromISR(i2c_master->cmd_semphr, do_yield);
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} else {
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xSemaphoreGive(i2c_master->cmd_semphr);
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}
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}
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}
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} else {
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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// If the read position has not been marked, that means the transaction doesn't contain read-ack
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@@ -309,7 +358,6 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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i2c_master->read_len_static = i2c_master->rx_cnt;
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}
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i2c_master->cmd_idx++;
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}
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i2c_master->trans_idx++;
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i2c_master->i2c_trans.cmd_count--;
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if (i2c_master->async_trans == false) {
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@@ -319,9 +367,11 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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xSemaphoreGive(i2c_master->cmd_semphr);
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}
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}
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}
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} else {
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atomic_store(&i2c_master->status, I2C_STATUS_READ);
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portENTER_CRITICAL_SAFE(&handle->spinlock);
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i2c_master->read_buf_pos = i2c_master->trans_idx;
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
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if (i2c_master->async_trans == false) {
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@@ -342,6 +392,7 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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i2c_master->i2c_trans.cmd_count--;
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}
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}
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i2c_master->read_buf_pos = i2c_master->trans_idx;
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
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portEXIT_CRITICAL_SAFE(&handle->spinlock);
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@@ -672,7 +723,7 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
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i2c_hal_context_t *hal = &i2c_master->base->hal;
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if (atomic_load(&i2c_master->status) == I2C_STATUS_READ) {
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i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->trans_idx];
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i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->read_buf_pos];
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portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
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i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->rx_cnt);
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/* rx_cnt bytes have just been read, increment the number of bytes used from the buffer */
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@@ -686,6 +737,7 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
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i2c_master->read_buf_pos = i2c_master->trans_idx;
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i2c_master->trans_idx++;
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i2c_operation->bytes_used = 0;
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i2c_master->read_len_static = 0;
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}
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portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
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}
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@@ -695,10 +747,11 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
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portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
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i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->read_len_static);
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// If the read command only contain nack marker, no read it for the second time.
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if (i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data) {
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if (i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data && i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].hw_cmd.ack_val == I2C_NACK_VAL) {
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i2c_ll_read_rxfifo(hal->dev, i2c_master->i2c_trans.ops[i2c_master->read_buf_pos + 1].data, 1);
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}
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i2c_master->w_r_size = i2c_master->read_len_static + 1;
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i2c_master->read_len_static = 0;
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i2c_master->contains_read = false;
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portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
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}
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@@ -25,7 +25,8 @@ typedef int i2c_port_num_t;
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* @brief Enumeration for I2C fsm status.
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*/
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typedef enum {
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I2C_STATUS_READ, /*!< read status for current master command */
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I2C_STATUS_READ, /*!< read status for current master command, but just partial read, not all data is read is this status */
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I2C_STATUS_READ_ALL, /*!< read status for current master command, all data is read is this status */
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I2C_STATUS_WRITE, /*!< write status for current master command */
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I2C_STATUS_START, /*!< Start status for current master command */
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I2C_STATUS_STOP, /*!< stop status for current master command */
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