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fix(esp_hw_support/sleep): stop TG0/TG1 watchdog if XTAL not power down in lightsleep

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This commit is contained in:
wuzhenghui
2023-12-26 20:50:52 +08:00
committed by BOT
parent 92e3fd4e44
commit 1090b496a1
3 changed files with 59 additions and 14 deletions
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4
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
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@@ -591,6 +591,10 @@ config SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
bool
default y
config SOC_SLEEP_TGWDT_STOP_WORKAROUND
bool
default y
config SOC_RTCIO_PIN_COUNT
int
default 0

2
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -258,6 +258,8 @@
#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
#define SOC_SLEEP_SYSTIMER_STALL_WORKAROUND 1
#define SOC_SLEEP_TGWDT_STOP_WORKAROUND 1
/*-------------------------- RTCIO CAPS --------------------------------------*/
/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
* for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */