From 5981ae8a11b26a84d174ee6ef40248aebcf2e935 Mon Sep 17 00:00:00 2001 From: hongshuqing Date: Fri, 16 May 2025 20:28:21 +0800 Subject: [PATCH] feat(pmu): support ldo dbias and ocode read from efuse for chip762 --- .../esp_hw_support/port/esp32c5/pmu_param.c | 2 +- .../esp_hw_support/port/esp32c61/ocode_init.c | 24 +++---- .../esp_hw_support/port/esp32c61/pmu_param.c | 64 +++++++++---------- .../esp_hw_support/port/esp32c61/pmu_sleep.c | 64 ++++++++++++++++++- .../hal/esp32c61/include/hal/efuse_ll.h | 40 ++++++++++++ 5 files changed, 145 insertions(+), 49 deletions(-) diff --git a/components/esp_hw_support/port/esp32c5/pmu_param.c b/components/esp_hw_support/port/esp32c5/pmu_param.c index 1b060f5b2b..b6d8253e78 100644 --- a/components/esp_hw_support/port/esp32c5/pmu_param.c +++ b/components/esp_hw_support/port/esp32c5/pmu_param.c @@ -463,7 +463,7 @@ uint32_t get_act_lp_dbias(void) lp_cali_dbias = 31; } } else { - ESP_HW_LOGW(TAG, "hp_cali_dbias not burnt in efuse, use default."); + ESP_HW_LOGW(TAG, "lp_cali_dbias not burnt in efuse, use default."); } return lp_cali_dbias; diff --git a/components/esp_hw_support/port/esp32c61/ocode_init.c b/components/esp_hw_support/port/esp32c61/ocode_init.c index 84592b90df..f21773509f 100644 --- a/components/esp_hw_support/port/esp32c61/ocode_init.c +++ b/components/esp_hw_support/port/esp32c61/ocode_init.c @@ -18,15 +18,15 @@ static const char *TAG = "ocode_init"; -// static void set_ocode_by_efuse(int ocode_scheme_ver) -// { - // assert(ocode_scheme_ver == 1); - // unsigned int ocode = efuse_ll_get_ocode(); +static void set_ocode_by_efuse(int ocode_scheme_ver) +{ + assert(ocode_scheme_ver == 1); + unsigned int ocode = efuse_ll_get_ocode(); - // //set ext_ocode - // REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_EXT_CODE, ocode); - // REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_CODE, 1); -// } + //set ext_ocode + REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_EXT_CODE, ocode); + REGI2C_WRITE_MASK(I2C_ULP, I2C_ULP_IR_FORCE_CODE, 1); +} static void IRAM_ATTR NOINLINE_ATTR calibrate_ocode(void) { @@ -82,9 +82,9 @@ static void IRAM_ATTR NOINLINE_ATTR calibrate_ocode(void) void esp_ocode_calib_init(void) { - // if (efuse_hal_blk_version() >= 1) { - // set_ocode_by_efuse(1); - // } else { + if (efuse_hal_blk_version() >= 1) { + set_ocode_by_efuse(1); + } else { calibrate_ocode(); - // } + } } diff --git a/components/esp_hw_support/port/esp32c61/pmu_param.c b/components/esp_hw_support/port/esp32c61/pmu_param.c index 5a13d514a6..d146f106aa 100644 --- a/components/esp_hw_support/port/esp32c61/pmu_param.c +++ b/components/esp_hw_support/port/esp32c61/pmu_param.c @@ -18,6 +18,8 @@ #include "esp_hw_log.h" #include "soc/clk_tree_defs.h" +static __attribute__((unused)) const char *TAG = "pmu_param"; + #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #endif @@ -416,52 +418,46 @@ const pmu_lp_system_analog_param_t * pmu_lp_system_analog_param_default(pmu_lp_m uint32_t get_act_hp_dbias(void) { - // TODO: IDF-9274 /* hp_cali_dbias is read from efuse to ensure that the hp_active_voltage is close to 1.15V */ uint32_t hp_cali_dbias = HP_CALI_DBIAS_DEFAULT; - // uint32_t blk_version = efuse_hal_blk_version(); - // if (blk_version >= 3) { - // hp_cali_dbias = efuse_ll_get_active_hp_dbias(); - // if (hp_cali_dbias != 0) { - // //efuse dbias need to add 2 to meet the CPU frequency switching - // if (hp_cali_dbias + 2 > 31) { - // hp_cali_dbias = 31; - // } else { - // hp_cali_dbias += 2; - // } - // } else { - // hp_cali_dbias = HP_CALI_DBIAS_DEFAULT; - // ESP_HW_LOGD(TAG, "hp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %" PRIu32 "\n", blk_version); - // } - // } + uint32_t blk_version = efuse_hal_blk_version(); + uint32_t hp_cali_dbias_efuse = 0; + if (blk_version >= 1) { + hp_cali_dbias_efuse = efuse_ll_get_active_hp_dbias(); + } + if (hp_cali_dbias_efuse > 0) { + //efuse dbias need to add 3 to meet the CPU frequency switching + hp_cali_dbias = hp_cali_dbias_efuse + 16 + 3; + if (hp_cali_dbias > 31) { + hp_cali_dbias = 31; + } + } else { + ESP_HW_LOGW(TAG, "hp_cali_dbias not burnt in efuse, use default."); + } return hp_cali_dbias; } uint32_t get_act_lp_dbias(void) { - // TODO: IDF-9274 /* lp_cali_dbias is read from efuse to ensure that the lp_active_voltage is close to 1.15V */ uint32_t lp_cali_dbias = LP_CALI_DBIAS_DEFAULT; - // uint32_t blk_version = efuse_hal_blk_version(); - // if (blk_version >= 3) { - // lp_cali_dbias = efuse_ll_get_active_lp_dbias(); - // if (lp_cali_dbias != 0) { - // //efuse dbias need to add 2 to meet the CPU frequency switching - // if (lp_cali_dbias + 2 > 31) { - // lp_cali_dbias = 31; - // } else { - // lp_cali_dbias += 2; - // } - // } else { - // lp_cali_dbias = LP_CALI_DBIAS_DEFAULT; - // ESP_HW_LOGD(TAG, "lp_cali_dbias not burnt in efuse or wrong value was burnt in blk version: %" PRIu32 "\n", blk_version); - // } - // } else { - // ESP_HW_LOGD(TAG, "blk_version is less than 3, act dbias not burnt in efuse\n"); - // } + uint32_t blk_version = efuse_hal_blk_version(); + uint32_t lp_cali_dbias_efuse = 0; + if (blk_version >= 1) { + lp_cali_dbias_efuse = efuse_ll_get_active_lp_dbias(); + } + if (lp_cali_dbias_efuse > 0) { + //efuse dbias need to add 3 to meet the CPU frequency switching + lp_cali_dbias = lp_cali_dbias_efuse + 16 + 3; + if (lp_cali_dbias > 31) { + lp_cali_dbias = 31; + } + } else { + ESP_HW_LOGW(TAG, "lp_cali_dbias not burnt in efuse, use default."); + } return lp_cali_dbias; } diff --git a/components/esp_hw_support/port/esp32c61/pmu_sleep.c b/components/esp_hw_support/port/esp32c61/pmu_sleep.c index 22f7900c83..ca7edfb618 100644 --- a/components/esp_hw_support/port/esp32c61/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c61/pmu_sleep.c @@ -19,6 +19,9 @@ #include "hal/efuse_hal.h" #include "esp_private/esp_pmu.h" #include "pmu_param.h" +#include "esp_hw_log.h" + +static __attribute__((unused)) const char *TAG = "pmu_sleep"; #define HP(state) (PMU_MODE_HP_ ## state) #define LP(state) (PMU_MODE_LP_ ## state) @@ -26,6 +29,58 @@ static bool s_pmu_sleep_regdma_backup_enabled; +static uint32_t get_lslp_dbg(void) +{ + uint32_t pmu_dbg_atten_lightsleep = PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 1) { + pmu_dbg_atten_lightsleep = efuse_ll_get_lslp_dbg(); + } else { + ESP_HW_LOGD(TAG, "lslp dbg not burnt in efuse, use default\n"); + } + + return pmu_dbg_atten_lightsleep; +} + +static uint32_t get_lslp_hp_dbias(void) +{ + uint32_t pmu_hp_dbias_lightsleep_0v6 = PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 1) { + pmu_hp_dbias_lightsleep_0v6 = efuse_ll_get_lslp_hp_dbias(); + } else { + ESP_HW_LOGD(TAG, "lslp hp dbias not burnt in efuse, use default\n"); + } + + return pmu_hp_dbias_lightsleep_0v6; +} + +static uint32_t get_dslp_dbg(void) +{ + uint32_t pmu_dbg_atten_deepsleep = PMU_DBG_ATTEN_DEEPSLEEP_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 1) { + pmu_dbg_atten_deepsleep = efuse_ll_get_dslp_dbg(); + } else { + ESP_HW_LOGD(TAG, "dslp dbg not burnt in efuse, use default\n"); + } + + return pmu_dbg_atten_deepsleep; +} + +static uint32_t get_dslp_lp_dbias(void) +{ + uint32_t pmu_lp_dbias_deepsleep_0v7 = PMU_LP_DBIAS_DEEPSLEEP_0V7_DEFAULT; + uint32_t blk_version = efuse_hal_blk_version(); + if (blk_version >= 1) { + pmu_lp_dbias_deepsleep_0v7 = efuse_ll_get_dslp_lp_dbias(); + } else { + ESP_HW_LOGD(TAG, "dslp lp dbias not burnt in efuse\n"); + } + + return pmu_lp_dbias_deepsleep_0v7; +} + void pmu_sleep_enable_regdma_backup(void) { if(!s_pmu_sleep_regdma_backup_enabled){ @@ -191,22 +246,27 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->digital = digital_default; pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(sleep_flags); + analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = get_dslp_dbg(); + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_dslp_lp_dbias(); config->analog = analog_default; } else { pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(sleep_flags, clk_flags); config->digital = digital_default; pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(sleep_flags); + analog_default.hp_sys.analog.dbg_atten = get_lslp_dbg(); + analog_default.hp_sys.analog.dbias = get_lslp_hp_dbias(); + analog_default.lp_sys[LP(SLEEP)].analog.dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT; if (!(sleep_flags & PMU_SLEEP_PD_XTAL) || !(sleep_flags & PMU_SLEEP_PD_RC_FAST)){ analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.hp_sys.analog.dbias = HP_CALI_DBIAS_SLP_1V1; + analog_default.hp_sys.analog.dbias = get_act_hp_dbias(); analog_default.hp_sys.analog.dbg_atten = 0; analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS_SLP_1V1; + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = 0; } diff --git a/components/hal/esp32c61/include/hal/efuse_ll.h b/components/hal/esp32c61/include/hal/efuse_ll.h index f86f8392ba..a8f52b8105 100644 --- a/components/hal/esp32c61/include/hal/efuse_ll.h +++ b/components/hal/esp32c61/include/hal/efuse_ll.h @@ -57,6 +57,46 @@ __attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en return EFUSE0.rd_repeat_data1.secure_boot_en; } +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_ocode(void) +{ + return EFUSE0.rd_sys_part1_data4.ocode; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_hp_dbias(void) +{ + return (EFUSE0.rd_mac_sys3.active_hp_dbias_1 << 3)|EFUSE0.rd_mac_sys2.active_hp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_active_lp_dbias(void) +{ + return EFUSE0.rd_mac_sys3.active_lp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_dbg(void) +{ + return EFUSE0.rd_mac_sys3.lslp_hp_dbg; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_lslp_hp_dbias(void) +{ + return EFUSE0.rd_mac_sys3.lslp_hp_dbias; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_dbg(void) +{ + return EFUSE0.rd_mac_sys3.dslp_lp_dbg; +} + +__attribute__((always_inline)) static inline uint32_t efuse_ll_get_dslp_lp_dbias(void) +{ + return EFUSE0.rd_mac_sys3.dslp_lp_dbias; +} + +__attribute__((always_inline)) static inline int32_t efuse_ll_get_dbias_vol_gap(void) +{ + return EFUSE0.rd_mac_sys3.lp_hp_dbias_vol_gap; +} + // use efuse_hal_get_major_chip_version() to get major chip version __attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void) {