From 1b4ad917c5980f5bd21e7c5d90463acdca407749 Mon Sep 17 00:00:00 2001 From: "C.S.M" Date: Mon, 1 Sep 2025 18:24:50 +0800 Subject: [PATCH] docs(uhci): Fix uhci compiling on non-supported target --- docs/conf_common.py | 5 ++++- docs/en/api-reference/peripherals/uart.rst | 12 ++++++------ docs/zh_CN/api-reference/peripherals/uart.rst | 12 ++++++------ 3 files changed, 16 insertions(+), 13 deletions(-) diff --git a/docs/conf_common.py b/docs/conf_common.py index 98775e4e1d..bc98723849 100644 --- a/docs/conf_common.py +++ b/docs/conf_common.py @@ -115,7 +115,9 @@ BITSCRAMBLER_DOCS = ['api-reference/peripherals/bitscrambler.rst'] CLK_TREE_DOCS = ['api-reference/peripherals/clk_tree.rst'] -UART_DOCS = ['api-reference/peripherals/uart.rst', 'api-reference/peripherals/uhci.rst'] +UART_DOCS = ['api-reference/peripherals/uart.rst'] + +UHCI_DOCS = ['api-reference/peripherals/uhci.rst'] SDMMC_DOCS = ['api-reference/peripherals/sdmmc_host.rst'] @@ -340,6 +342,7 @@ conditional_include_dict = { 'SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE': MM_SYNC_DOCS, 'SOC_CLK_TREE_SUPPORTED': CLK_TREE_DOCS, 'SOC_UART_SUPPORTED': UART_DOCS, + 'SOC_UHCI_SUPPORTED': UHCI_DOCS, 'SOC_SDMMC_HOST_SUPPORTED': SDMMC_DOCS, 'SOC_SDIO_SLAVE_SUPPORTED': SDIO_SLAVE_DOCS, 'SOC_MCPWM_SUPPORTED': MCPWM_DOCS, diff --git a/docs/en/api-reference/peripherals/uart.rst b/docs/en/api-reference/peripherals/uart.rst index e2818036a3..22316ff24a 100644 --- a/docs/en/api-reference/peripherals/uart.rst +++ b/docs/en/api-reference/peripherals/uart.rst @@ -18,13 +18,13 @@ Each UART controller is independently configurable with parameters such as baud Additionally, the {IDF_TARGET_NAME} chip has one low-power (LP) UART controller. It is the cut-down version of regular UART. Usually, the LP UART controller only support basic UART functionality with a much smaller RAM size, and does not support IrDA or RS485 protocols. For a full list of difference between UART and LP UART, please refer to the **{IDF_TARGET_NAME} Technical Reference Manual** > **UART Controller (UART)** > **Features** [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__]). -.. toctree:: - :hidden: - - uhci - .. only:: SOC_UHCI_SUPPORTED + .. toctree:: + :hidden: + + uhci + The {IDF_TARGET_NAME} chip also supports using DMA with UART. For details, see to :doc:`uhci`. Functional Overview @@ -239,7 +239,7 @@ The UART controller supports a number of communication modes. A mode can be sele Use Interrupts ^^^^^^^^^^^^^^^^ -There are many interrupts that can be generated depending on specific UART states or detected errors. The full list of available interrupts is provided in *{IDF_TARGET_NAME} Technical Reference Manual* > *UART Controller (UART)* > *UART Interrupts* and *UHCI Interrupts* [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__]. You can enable or disable specific interrupts by calling :cpp:func:`uart_enable_intr_mask` or :cpp:func:`uart_disable_intr_mask` respectively. +There are many interrupts that can be generated depending on specific UART states or detected errors. The full list of available interrupts is provided in *{IDF_TARGET_NAME} Technical Reference Manual* > *UART Controller (UART)* > *UART Interrupts* [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__]. You can enable or disable specific interrupts by calling :cpp:func:`uart_enable_intr_mask` or :cpp:func:`uart_disable_intr_mask` respectively. The UART driver provides a convenient way to handle specific interrupts by wrapping them into corresponding events. Events defined in :cpp:type:`uart_event_type_t` can be reported to a user application using the FreeRTOS queue functionality. diff --git a/docs/zh_CN/api-reference/peripherals/uart.rst b/docs/zh_CN/api-reference/peripherals/uart.rst index 93d77e1af5..e351eeb184 100644 --- a/docs/zh_CN/api-reference/peripherals/uart.rst +++ b/docs/zh_CN/api-reference/peripherals/uart.rst @@ -18,13 +18,13 @@ 此外，{IDF_TARGET_NAME} 芯片还有一个满足低功耗需求的 LP UART 控制器。LP UART 是原 UART 的功能剪裁版本。它只支持基础 UART 功能，不支持 IrDA 或 RS485 协议，并且只有一块较小的 RAM 存储空间。想要全面了解的 UART 及 LP UART 功能区别，请参考 **{IDF_TARGET_NAME} 技术参考手册** > UART 控制器 (UART) > 主要特性 [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__]。 -.. toctree:: - :hidden: - - uhci - .. only:: SOC_UHCI_SUPPORTED + .. toctree:: + :hidden: + + uhci + {IDF_TARGET_NAME} 芯片也支持 UART DMA 模式, 请参考 :doc:`uhci` 以获得更多信息. 功能概述 @@ -239,7 +239,7 @@ UART 控制器支持多种通信模式，使用函数 :cpp:func:`uart_set_mode` 使用中断 ^^^^^^^^^^^^^^^^^ -根据特定的 UART 状态或检测到的错误，可以生成许多不同的中断。**{IDF_TARGET_NAME} 技术参考手册** > UART 控制器 (UART) > UART 中断 和 UHCI 中断 [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__] 中提供了可用中断的完整列表。调用 :cpp:func:`uart_enable_intr_mask` 或 :cpp:func:`uart_disable_intr_mask` 能够分别启用或禁用特定中断。 +根据特定的 UART 状态或检测到的错误，可以生成许多不同的中断。**{IDF_TARGET_NAME} 技术参考手册** > UART 控制器 (UART) > UART 中断 [`PDF <{IDF_TARGET_TRM_EN_URL}#uart>`__] 中提供了可用中断的完整列表。调用 :cpp:func:`uart_enable_intr_mask` 或 :cpp:func:`uart_disable_intr_mask` 能够分别启用或禁用特定中断。 UART 驱动提供了一种便利的方法来处理特定的中断，即将中断包装成相应的事件。这些事件定义在 :cpp:type:`uart_event_type_t` 中，FreeRTOS 队列功能可将这些事件报告给用户应用程序。