diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c index a9e839b444..31dfed8e29 100644 --- a/components/bt/controller/esp32c3/bt.c +++ b/components/bt/controller/esp32c3/bt.c @@ -111,7 +111,7 @@ do{\ } while(0) #define OSI_FUNCS_TIME_BLOCKING 0xffffffff -#define OSI_VERSION 0x00010008 +#define OSI_VERSION 0x00010009 #define OSI_MAGIC_VALUE 0xFADEBEAD /* Types definition @@ -138,15 +138,24 @@ typedef struct { typedef void (* osi_intr_handler)(void); +typedef struct { + int source; /*!< ISR source */ + int flags; /*!< ISR alloc flag */ + void (*fn)(void *); /*!< ISR function */ + void *arg; /*!< ISR function args*/ + intr_handle_t *handle; /*!< ISR handle */ + esp_err_t ret; +} btdm_isr_alloc_t; + /* OSI function */ struct osi_funcs_t { uint32_t _magic; uint32_t _version; - void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio); - void (*_interrupt_clear)(int interrupt_source, int interrupt_no); - void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg); - void (*_interrupt_disable)(void); - void (*_interrupt_restore)(void); + int (* _interrupt_alloc)(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle); + int (* _interrupt_free)(void *handle); + void (*_interrupt_handler_set_rsv)(int interrupt_no, intr_handler_t fn, void *arg); + void (*_global_intr_disable)(void); + void (*_global_intr_restore)(void); void (*_task_yield)(void); void (*_task_yield_from_isr)(void); void *(*_semphr_create)(uint32_t max, uint32_t init); @@ -191,8 +200,8 @@ struct osi_funcs_t { uint32_t (* _coex_schm_interval_get)(void); uint8_t (* _coex_schm_curr_period_get)(void); void *(* _coex_schm_curr_phase_get)(void); - void (* _interrupt_on)(int intr_num); - void (* _interrupt_off)(int intr_num); + int (* _interrupt_enable)(void *handle); + int (* _interrupt_disable)(void *handle); void (* _esp_hw_power_down)(void); void (* _esp_hw_power_up)(void); void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem); @@ -273,11 +282,10 @@ extern uint32_t _bt_controller_data_end; /* Local Function Declare ********************************************************************* */ -static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio); -static void interrupt_clear_wrapper(int intr_source, int intr_num); -static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg); -static void interrupt_disable(void); -static void interrupt_restore(void); +static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle); +static int interrupt_free_wrapper(void *handle); +static void global_interrupt_disable(void); +static void global_interrupt_restore(void); static void task_yield_from_isr(void); static void *semphr_create_wrapper(uint32_t max, uint32_t init); static void semphr_delete_wrapper(void *semphr); @@ -315,8 +323,8 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); static uint32_t coex_schm_interval_get_wrapper(void); static uint8_t coex_schm_curr_period_get_wrapper(void); static void * coex_schm_curr_phase_get_wrapper(void); -static void interrupt_on_wrapper(int intr_num); -static void interrupt_off_wrapper(int intr_num); +static int interrupt_enable_wrapper(void *handle); +static int interrupt_disable_wrapper(void *handle); static void btdm_hw_mac_power_up_wrapper(void); static void btdm_hw_mac_power_down_wrapper(void); static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem); @@ -337,11 +345,11 @@ static void bt_controller_deinit_internal(void); static const struct osi_funcs_t osi_funcs_ro = { ._magic = OSI_MAGIC_VALUE, ._version = OSI_VERSION, - ._interrupt_set = interrupt_set_wrapper, - ._interrupt_clear = interrupt_clear_wrapper, - ._interrupt_handler_set = interrupt_handler_set_wrapper, - ._interrupt_disable = interrupt_disable, - ._interrupt_restore = interrupt_restore, + ._interrupt_alloc = interrupt_alloc_wrapper, + ._interrupt_free = interrupt_free_wrapper, + ._interrupt_handler_set_rsv = NULL, + ._global_intr_disable = global_interrupt_disable, + ._global_intr_restore = global_interrupt_restore, ._task_yield = vPortYield, ._task_yield_from_isr = task_yield_from_isr, ._semphr_create = semphr_create_wrapper, @@ -386,8 +394,8 @@ static const struct osi_funcs_t osi_funcs_ro = { ._coex_schm_interval_get = coex_schm_interval_get_wrapper, ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper, ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper, - ._interrupt_on = interrupt_on_wrapper, - ._interrupt_off = interrupt_off_wrapper, + ._interrupt_enable = interrupt_enable_wrapper, + ._interrupt_disable = interrupt_disable_wrapper, ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper, ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper, ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper, @@ -474,36 +482,44 @@ static inline void esp_bt_power_domain_off(void) esp_wifi_bt_power_domain_off(); } -static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio) +static void btdm_intr_alloc(void *arg) { - esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num); -#if __riscv - esprv_intc_int_set_priority(intr_num, intr_prio); - //esprv_intc_int_enable_level(1 << intr_num); - esprv_intc_int_set_type(intr_num, 0); + btdm_isr_alloc_t *p = arg; + p->ret = esp_intr_alloc(p->source, p->flags, p->fn, p->arg, p->handle); +} + +static int interrupt_alloc_wrapper(int cpu_id, int source, intr_handler_t handler, void *arg, void **ret_handle) +{ + btdm_isr_alloc_t p; + p.source = source; + p.flags = ESP_INTR_FLAG_LEVEL3 | ESP_INTR_FLAG_IRAM; + p.fn = handler; + p.arg = arg; + p.handle = (intr_handle_t *)ret_handle; +#if CONFIG_FREERTOS_UNICORE + btdm_intr_alloc(&p); +#else + esp_ipc_call_blocking(cpu_id, btdm_intr_alloc, &p); #endif + return p.ret; } -static void interrupt_clear_wrapper(int intr_source, int intr_num) +static int interrupt_free_wrapper(void *handle) { + return esp_intr_free((intr_handle_t)handle); } -static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg) +static int interrupt_enable_wrapper(void *handle) { - esp_cpu_intr_set_handler(n, fn, arg); + return esp_intr_enable((intr_handle_t)handle); } -static void interrupt_on_wrapper(int intr_num) +static int interrupt_disable_wrapper(void *handle) { - esp_cpu_intr_enable(1 << intr_num); + return esp_intr_disable((intr_handle_t)handle); } -static void interrupt_off_wrapper(int intr_num) -{ - esp_cpu_intr_disable(1<bd_addr, NULL); - btm_sec_free_dev(p_dev_rec, transport); + btm_sec_free_dev(p_dev_rec, transport); } +#if (BLE_SMP_ID_RESET_ENABLE == TRUE) + /* + * There are tracking risks associated with using a fixed or static IRK. + * A best-practices approach, when all pairing and bonding records are deleted, + * assign a new randomly-generated IRK. + */ + if (list_is_empty(btm_cb.p_sec_dev_rec_list)) { + btm_ble_reset_id(); + } +#endif + return TRUE; } @@ -640,7 +651,7 @@ tBTM_SEC_DEV_REC *btm_find_oldest_dev (void) tBTM_SEC_DEV_REC *p_dev_rec = NULL; tBTM_SEC_DEV_REC *p_oldest = NULL; list_node_t *p_node = NULL; - UINT32 ot = 0xFFFFFFFF; + UINT32 old_ts = 0xFFFFFFFF; /* First look for the non-paired devices for the oldest entry */ for (p_node = list_begin(btm_cb.p_sec_dev_rec_list); p_node; p_node = list_next(p_node)) { @@ -650,13 +661,13 @@ tBTM_SEC_DEV_REC *btm_find_oldest_dev (void) continue; /* Device is paired so skip it */ } - if (p_dev_rec->timestamp < ot) { + if (p_dev_rec->timestamp < old_ts) { p_oldest = p_dev_rec; - ot = p_dev_rec->timestamp; + old_ts = p_dev_rec->timestamp; } } - if (ot != 0xFFFFFFFF) { + if (old_ts != 0xFFFFFFFF) { return (p_oldest); } @@ -666,9 +677,9 @@ tBTM_SEC_DEV_REC *btm_find_oldest_dev (void) continue; } - if (p_dev_rec->timestamp < ot) { + if (p_dev_rec->timestamp < old_ts) { p_oldest = p_dev_rec; - ot = p_dev_rec->timestamp; + old_ts = p_dev_rec->timestamp; } } return (p_oldest); diff --git a/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c b/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c index 1c95ca8e70..6dfc26cbe6 100644 --- a/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c +++ b/components/esp_hw_support/port/esp32c3/esp_cpu_intr.c @@ -11,11 +11,10 @@ void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_ { /* On the ESP32-C3, interrupt: * - 1 is for Wi-Fi - * - 5 and 8 for Bluetooth * - 6 for "permanently disabled interrupt", named INT_MUX_DISABLED_INTNO in the interrupt allocator */ // [TODO: IDF-2465] - const uint32_t rsvd_mask = BIT(1) | BIT(5) | BIT(6) | BIT(8); + const uint32_t rsvd_mask = BIT(1) | BIT(6); intr_desc_ret->priority = 1; intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA; diff --git a/components/esp_hw_support/port/esp32s3/esp_cpu_intr.c b/components/esp_hw_support/port/esp32s3/esp_cpu_intr.c index acd0cbe83d..7c0ef80acc 100644 --- a/components/esp_hw_support/port/esp32s3/esp_cpu_intr.c +++ b/components/esp_hw_support/port/esp32s3/esp_cpu_intr.c @@ -20,31 +20,6 @@ typedef struct { } intr_desc_t; -/** - * @brief Reserve the interrupts on the core where Bluetooth will run. - * The macro CONFIG_BT_CTRL_PINNED_TO_CORE is only defined if Bluetooth controller is enabled. - * It is set to the core where it will run. - */ -#ifdef CONFIG_BT_CTRL_PINNED_TO_CORE - #if CONFIG_BT_CTRL_PINNED_TO_CORE == 0 - #define CORE_0_INTERRUPT_5 ESP_CPU_INTR_DESC_FLAG_RESVD - #define CORE_1_INTERRUPT_5 0 - #define CORE_0_INTERRUPT_8 ESP_CPU_INTR_DESC_FLAG_RESVD - #define CORE_1_INTERRUPT_8 0 - #elif CONFIG_BT_CTRL_PINNED_TO_CORE == 1 - #define CORE_0_INTERRUPT_5 0 - #define CORE_1_INTERRUPT_5 ESP_CPU_INTR_DESC_FLAG_RESVD - #define CORE_0_INTERRUPT_8 0 - #define CORE_1_INTERRUPT_8 ESP_CPU_INTR_DESC_FLAG_RESVD - #endif -#else // Bluetooth not enabled - #define CORE_0_INTERRUPT_5 0 - #define CORE_1_INTERRUPT_5 0 - #define CORE_0_INTERRUPT_8 0 - #define CORE_1_INTERRUPT_8 0 -#endif - - const static intr_desc_t intr_desc_table [SOC_CPU_INTR_NUM] = { /* Interrupt 0 reserved for WMAC (Wifi) */ #if CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 @@ -57,12 +32,10 @@ const static intr_desc_t intr_desc_table [SOC_CPU_INTR_NUM] = { [3] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { 0, 0 } }, /* Interrupt 4 reserved for WBB */ [4] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { ESP_CPU_INTR_DESC_FLAG_RESVD, 0 } }, - /* Interrupt 5 reserved for BT/BLE Controller */ - [5] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { CORE_0_INTERRUPT_5, CORE_1_INTERRUPT_5 } }, + [5] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { 0, 0 } }, [6] = { 1, ESP_CPU_INTR_TYPE_NA, { ESP_CPU_INTR_DESC_FLAG_SPECIAL, ESP_CPU_INTR_DESC_FLAG_SPECIAL } }, [7] = { 1, ESP_CPU_INTR_TYPE_NA, { ESP_CPU_INTR_DESC_FLAG_SPECIAL, ESP_CPU_INTR_DESC_FLAG_SPECIAL } }, - /* Interrupt 8 reserved for BT/BLE Controller */ - [8] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { CORE_0_INTERRUPT_8, CORE_1_INTERRUPT_8 } }, + [8] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { 0, 0 } }, [9] = { 1, ESP_CPU_INTR_TYPE_LEVEL, { 0, 0 } }, [10] = { 1, ESP_CPU_INTR_TYPE_EDGE, { 0, 0 } }, [11] = { 3, ESP_CPU_INTR_TYPE_NA, { ESP_CPU_INTR_DESC_FLAG_SPECIAL, ESP_CPU_INTR_DESC_FLAG_SPECIAL } }, diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld index c422bf29c8..abcacdc622 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld @@ -115,7 +115,6 @@ r_lld_con_evt_time_update_eco = 0x40001d0c; r_lld_con_start_eco = 0x40001d10; r_lld_con_frm_isr_eco = 0x40001d14; r_lld_con_tx_eco = 0x40001d18; -r_lld_scan_evt_start_cbk_eco = 0x40001d20; r_lld_ext_scan_dynamic_pti_process_eco = 0x40001d28; r_lld_scan_frm_eof_isr_eco = 0x40001d2c; r_lld_sync_start_eco = 0x40001d30; @@ -142,7 +141,6 @@ r_bt_bb_recorrect_is_dead = 0x40001d84; r_bt_bb_restart_hw_recorrect = 0x40001d88; r_ke_task_handler_pre = 0x40001da0; r_ke_task_handler_end = 0x40001da4; -r_ke_task_handler_get_overwrite = 0x40001da8; r_lld_scan_frm_skip_isr_eco = 0x40001db0; r_lld_ext_scan_dynamic_pti_reset = 0x40001db4; r_llc_rem_phy_upd_proc_continue_eco = 0x40001db8; @@ -215,6 +213,8 @@ r_lld_scan_start_eco = 0x40001d24; r_lld_scan_try_sched_eco = 0x40001dac; r_lld_scan_start_hook = 0x40001c74; r_lld_init_start_hook = 0x40001cb8; +r_lld_scan_evt_start_cbk_eco = 0x40001d20; +r_ke_task_handler_get_overwrite = 0x40001da8; */ diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index a5731b2bb2..3217146cdf 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -1107,7 +1107,7 @@ r_lld_res_list_is_empty = 0x40001220; r_lld_res_list_local_rpa_get = 0x40001224; r_lld_res_list_peer_rpa_get = 0x40001228; r_lld_res_list_peer_update = 0x4000122c; -r_lld_res_list_priv_mode_update = 0x40001230; +/* r_lld_res_list_priv_mode_update = 0x40001230; */ r_lld_reset_reg = 0x40001238; r_lld_rpa_renew = 0x4000123c; r_lld_rpa_renew_evt_canceled_cbk = 0x40001240; @@ -1243,10 +1243,10 @@ r_rw_cryto_aes_cmac = 0x4000145c; r_rw_v9_init_em_radio_table = 0x40001460; r_rwble_sleep_enter = 0x40001468; r_rwble_sleep_wakeup_end = 0x4000146c; -r_rwbtdm_isr_wrapper = 0x40001470; +/* r_rwbtdm_isr_wrapper = 0x40001470; */ r_rwip_active_check = 0x40001474; r_rwip_aes_encrypt = 0x40001478; -r_rwip_assert = 0x4000147c; +/* r_rwip_assert = 0x4000147c; */ r_rwip_crypt_evt_handler = 0x40001480; r_rwip_crypt_isr_handler = 0x40001484; r_rwip_eif_get = 0x40001488; diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index 509553d569..ce26c4e487 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -1380,7 +1380,7 @@ r_lld_res_list_is_empty = 0x40004644; r_lld_res_list_local_rpa_get = 0x40004650; r_lld_res_list_peer_rpa_get = 0x4000465c; r_lld_res_list_peer_update = 0x40004668; -r_lld_res_list_priv_mode_update = 0x40004674; +/* r_lld_res_list_priv_mode_update = 0x40004674; */ r_lld_reset_reg = 0x4000468c; r_lld_rpa_renew = 0x40004698; r_lld_rpa_renew_evt_canceled_cbk = 0x400046a4; @@ -1516,10 +1516,10 @@ r_rw_cryto_aes_cmac = 0x40004cf8; r_rw_v9_init_em_radio_table = 0x40004d04; r_rwble_sleep_enter = 0x40004d1c; r_rwble_sleep_wakeup_end = 0x40004d28; -r_rwbtdm_isr_wrapper = 0x40004d34; +/* r_rwbtdm_isr_wrapper = 0x40004d34; */ r_rwip_active_check = 0x40004d40; r_rwip_aes_encrypt = 0x40004d4c; -r_rwip_assert = 0x40004d58; +/* r_rwip_assert = 0x40004d58; */ r_rwip_crypt_evt_handler = 0x40004d64; r_rwip_crypt_isr_handler = 0x40004d70; r_rwip_eif_get = 0x40004d7c; diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt index a193835854..dfe7c3ba0a 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt @@ -5,12 +5,12 @@ CPU 0 interrupt status: 2 1 Level Used: RTC_CORE 3 1 Level Used: SYSTIMER_TARGET2_EDGE 4 1 Level Used: FROM_CPU_INTR0 - 5 * * Reserved + 5 1 Level Used: SYSTIMER_TARGET0_EDGE 6 * * Reserved - 7 1 Level Used: SYSTIMER_TARGET0_EDGE - 8 * * Reserved - 9 1 Level Used: TG0_WDT_LEVEL - 10 1 Level Used: UART0 + 7 1 Level Used: TG0_WDT_LEVEL + 8 1 Level Used: UART0 + 9 * * Free + 10 * * Free 11 * * Free 12 * * Free 13 * * Free @@ -32,5 +32,5 @@ CPU 0 interrupt status: 29 * * Free 30 * * Free 31 * * Free -Interrupts available for general use: 17 -Shared interrupts: 0 +Interrupts available for general use: 19 +Shared interrupts: 0 \ No newline at end of file