i2s: correct soc info

1. remove non-exist I2S instance
2. update soc_caps.h, i2s_ll.h

components/soc/esp32/include/soc/soc_caps.h

@@ -68,7 +68,6 @@
 #define SOC_SDIO_SLAVE_SUPPORTED    1
 #define SOC_TWAI_SUPPORTED          1
 #define SOC_EMAC_SUPPORTED          1
-#define SOC_RISCV_COPROC_SUPPORTED  0   //TODO: correct the caller and remove this line
 #define SOC_CPU_CORES_NUM           2
 #define SOC_ULP_SUPPORTED           1
 #define SOC_RTC_SLOW_MEM_SUPPORTED  1
@@ -144,6 +143,14 @@
 #define SOC_I2S_APLL_MIN_FREQ       (250000000)
 #define SOC_I2S_APLL_MAX_FREQ       (500000000)
 #define SOC_I2S_APLL_MIN_RATE       (10675) //in Hz, I2S Clock rate limited by hardware
+#define SOC_I2S_TRANS_SIZE_ALIGN_WORD (1) // I2S DMA transfer size must be aligned to word
+#define SOC_I2S_LCD_I80_VARIANT       (1) // I2S has a special LCD mode that can generate Intel 8080 TX timing
+
+/*-------------------------- LCD CAPS ----------------------------------------*/
+/* Notes: On esp32, LCD intel 8080 timing is generated by I2S peripheral */
+#define SOC_LCD_I80_SUPPORTED      (1)  /*!< Intel 8080 LCD is supported */
+#define SOC_LCD_I80_BUSES          (1)  /*!< Only I2S0 has LCD mode */
+#define SOC_LCD_I80_BUS_WIDTH      (24) /*!< Intel 8080 bus width */
 
 /*-------------------------- LEDC CAPS ---------------------------------------*/
 #define SOC_LEDC_SUPPORT_HS_MODE  (1)