From 1687c53700315634958e9669e7e9347fceab3a74 Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Fri, 13 Dec 2019 18:27:27 +0800 Subject: [PATCH] freertos: Fix save_context. Add RSYNC after WSR RSYNC waits for all previously fetched WSR.* instructions to be performed before inter- preting the register fields of the next instruction. --- components/freertos/xtensa_context.S | 1 + 1 file changed, 1 insertion(+) diff --git a/components/freertos/xtensa_context.S b/components/freertos/xtensa_context.S index 4db99114be..3d052d9e15 100644 --- a/components/freertos/xtensa_context.S +++ b/components/freertos/xtensa_context.S @@ -174,6 +174,7 @@ _xt_context_save: movi a3, PS_INTLEVEL(1) /* For some curious reason the level 1 interrupts */ or a2, a2, a3 /* dont set the intlevel correctly on PS, we need to */ wsr a2, PS /* do this manually */ + rsync _not_l1: rsr a2, PS /* finally umask the window exceptions */ movi a3, ~(PS_EXCM_MASK)