mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-01 19:54:32 +02:00
Merge branch 'feature/re-enable-heap-test-c2_v5.0' into 'release/v5.0'
heap: re-enable temporarily disabled test on esp32c2 (backport v5.0) See merge request espressif/esp-idf!21873
This commit is contained in:
@@ -395,11 +395,13 @@ extern int _data_start;
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#define CONDITIONAL_NONE 0x0
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#define CONDITIONAL_NONE 0x0
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#define CONDITIONAL_RX PMP_R | PMP_X
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#define CONDITIONAL_RX PMP_R | PMP_X
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#define CONDITIONAL_RW PMP_R | PMP_W
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#define CONDITIONAL_RW PMP_R | PMP_W
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#define CONDITIONAL_RWX PMP_R | PMP_W | PMP_X
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#else
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#else
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// With L bit set
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// With L bit set
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#define CONDITIONAL_NONE NONE
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#define CONDITIONAL_NONE NONE
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#define CONDITIONAL_RX RX
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#define CONDITIONAL_RX RX
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#define CONDITIONAL_RW RW
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#define CONDITIONAL_RW RW
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#define CONDITIONAL_RWX RWX
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#endif
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#endif
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void esp_cpu_configure_region_protection(void)
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void esp_cpu_configure_region_protection(void)
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@@ -466,7 +468,12 @@ void esp_cpu_configure_region_protection(void)
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} else {
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} else {
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// 1. IRAM
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// 1. IRAM
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PMP_ENTRY_SET(0, SOC_DIRAM_IRAM_LOW, CONDITIONAL_NONE);
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PMP_ENTRY_SET(0, SOC_DIRAM_IRAM_LOW, CONDITIONAL_NONE);
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#if CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RX);
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RX);
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#else
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RWX);
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#endif
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// 2. DRAM
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// 2. DRAM
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PMP_ENTRY_SET(2, DRAM_START, CONDITIONAL_NONE);
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PMP_ENTRY_SET(2, DRAM_START, CONDITIONAL_NONE);
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@@ -1,3 +1,8 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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/*
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/*
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Tests for D/IRAM support in heap capability allocator
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Tests for D/IRAM support in heap capability allocator
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*/
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*/
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@@ -10,8 +15,7 @@
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#define ALLOC_SZ 1024
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#define ALLOC_SZ 1024
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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//IDF-5167
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static void *malloc_block_diram(uint32_t caps)
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static void *malloc_block_diram(uint32_t caps)
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{
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{
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void *attempts[256] = { 0 }; // Allocate up to 256 ALLOC_SZ blocks to exhaust all non-D/IRAM memory temporarily
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void *attempts[256] = { 0 }; // Allocate up to 256 ALLOC_SZ blocks to exhaust all non-D/IRAM memory temporarily
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@@ -74,4 +78,4 @@ TEST_CASE("Allocate D/IRAM as IRAM", "[heap]")
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free(iram);
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free(iram);
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}
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}
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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@@ -1,3 +1,8 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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/*
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/*
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Tests for the capabilities-based memory allocator.
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Tests for the capabilities-based memory allocator.
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*/
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*/
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@@ -13,9 +18,6 @@
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#include <stdlib.h>
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#include <stdlib.h>
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#include <sys/param.h>
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#include <sys/param.h>
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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TEST_CASE("Capabilities allocator test", "[heap]")
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TEST_CASE("Capabilities allocator test", "[heap]")
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{
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{
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@@ -106,8 +108,7 @@ TEST_CASE("Capabilities allocator test", "[heap]")
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free(m1);
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free(m1);
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printf("Done.\n");
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printf("Done.\n");
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}
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}
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#endif
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
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#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
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TEST_CASE("IRAM_8BIT capability test", "[heap]")
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TEST_CASE("IRAM_8BIT capability test", "[heap]")
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@@ -170,11 +171,10 @@ TEST_CASE("heap_caps metadata test", "[heap]")
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TEST_ASSERT(after.minimum_free_bytes < original.total_free_bytes);
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TEST_ASSERT(after.minimum_free_bytes < original.total_free_bytes);
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}
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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/* Small function runs from IRAM to check that malloc/free/realloc
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/* Small function runs from IRAM to check that malloc/free/realloc
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all work OK when cache is disabled...
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all work OK when cache is disabled...
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*/
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*/
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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static IRAM_ATTR __attribute__((noinline)) bool iram_malloc_test(void)
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static IRAM_ATTR __attribute__((noinline)) bool iram_malloc_test(void)
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{
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{
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spi_flash_guard_get()->start(); // Disables flash cache
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spi_flash_guard_get()->start(); // Disables flash cache
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@@ -196,7 +196,7 @@ TEST_CASE("heap_caps_xxx functions work with flash cache disabled", "[heap]")
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{
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{
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TEST_ASSERT( iram_malloc_test() );
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TEST_ASSERT( iram_malloc_test() );
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}
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}
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifdef CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS
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#ifdef CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS
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TEST_CASE("When enabled, allocation operation failure generates an abort", "[heap][reset=abort,SW_CPU_RESET]")
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TEST_CASE("When enabled, allocation operation failure generates an abort", "[heap][reset=abort,SW_CPU_RESET]")
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@@ -1,3 +1,8 @@
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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/*
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/*
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Generic test for realloc
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Generic test for realloc
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*/
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*/
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@@ -23,8 +28,6 @@ TEST_CASE("realloc shrink buffer in place", "[heap]")
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#endif
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#endif
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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TEST_CASE("realloc shrink buffer with EXEC CAPS", "[heap]")
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TEST_CASE("realloc shrink buffer with EXEC CAPS", "[heap]")
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{
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{
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@@ -64,5 +67,4 @@ TEST_CASE("realloc move data to a new heap type", "[heap]")
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free(c);
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free(c);
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}
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}
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#endif
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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@@ -787,12 +787,9 @@ components/heap/include/esp_heap_trace.h
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components/heap/include/heap_memory_layout.h
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components/heap/include/heap_memory_layout.h
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components/heap/test/test_aligned_alloc_caps.c
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components/heap/test/test_aligned_alloc_caps.c
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components/heap/test/test_allocator_timings.c
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components/heap/test/test_allocator_timings.c
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components/heap/test/test_diram.c
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components/heap/test/test_heap_trace.c
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components/heap/test/test_heap_trace.c
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components/heap/test/test_leak.c
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components/heap/test/test_leak.c
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components/heap/test/test_malloc.c
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components/heap/test/test_malloc.c
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components/heap/test/test_malloc_caps.c
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components/heap/test/test_realloc.c
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components/heap/test/test_runtime_heap_reg.c
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components/heap/test/test_runtime_heap_reg.c
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components/heap/test_multi_heap_host/main.cpp
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components/heap/test_multi_heap_host/main.cpp
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components/heap/test_multi_heap_host/test_multi_heap.cpp
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components/heap/test_multi_heap_host/test_multi_heap.cpp
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@@ -1,3 +1,4 @@
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# This config is split between targets since different component needs to be included
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# This config is split between targets since different component needs to be included
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CONFIG_IDF_TARGET="esp32c2"
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CONFIG_IDF_TARGET="esp32c2"
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TEST_EXCLUDE_COMPONENTS=app_trace bootloader_support console efuse esp_common esp_eth esp_event esp_hid esp_http_client esp_http_server esp_netif esp_phy esp_ringbuf esp_rom esp_wifi espcoredump hal lwip mbedtls mdns mqtt newlib nvs_flash partition_table protocomm sdmmc spiffs freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs
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TEST_EXCLUDE_COMPONENTS=app_trace bootloader_support console efuse esp_common esp_eth esp_event esp_hid esp_http_client esp_http_server esp_netif esp_phy esp_ringbuf esp_rom esp_wifi espcoredump hal lwip mbedtls mdns mqtt newlib nvs_flash partition_table protocomm sdmmc spiffs freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n # for c2 this config must be disabled for certain tests
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@@ -1,3 +1,4 @@
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# This config is split between targets since different component needs to be included
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# This config is split between targets since different component needs to be included
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CONFIG_IDF_TARGET="esp32c2"
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CONFIG_IDF_TARGET="esp32c2"
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TEST_COMPONENTS=freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs
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TEST_COMPONENTS=freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n # for c2 this config must be disabled for certain tests
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@@ -2,3 +2,4 @@ CONFIG_IDF_TARGET="esp32c2"
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TEST_COMPONENTS=heap
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TEST_COMPONENTS=heap
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CONFIG_HEAP_POISONING_COMPREHENSIVE=n
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CONFIG_HEAP_POISONING_COMPREHENSIVE=n
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CONFIG_HEAP_POISONING_LIGHT=y
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CONFIG_HEAP_POISONING_LIGHT=y
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n # for c2 this config must be disabled for certain tests
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@@ -3,3 +3,4 @@ TEST_COMPONENTS=freertos esp_hw_support esp_system esp_ipc esp_timer driver heap
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n # for c2 this config must be disabled for certain tests
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