diff --git a/components/bootloader_support/src/bootloader_console.c b/components/bootloader_support/src/bootloader_console.c index a5afc11f31..7007fdc836 100644 --- a/components/bootloader_support/src/bootloader_console.c +++ b/components/bootloader_support/src/bootloader_console.c @@ -76,10 +76,12 @@ void bootloader_console_init(void) // Route GPIO signals to/from pins const uint32_t tx_idx = uart_periph_signal[uart_num].tx_sig; const uint32_t rx_idx = uart_periph_signal[uart_num].rx_sig; + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO); PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]); esp_rom_gpio_pad_pullup_only(uart_rx_gpio); esp_rom_gpio_connect_out_signal(uart_tx_gpio, tx_idx, 0, 0); esp_rom_gpio_connect_in_signal(uart_rx_gpio, rx_idx, 0); + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO); // Enable the peripheral periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + uart_num); } diff --git a/components/hal/esp32s3/include/hal/uart_ll.h b/components/hal/esp32s3/include/hal/uart_ll.h index 95b53c5cbd..7b30bba218 100644 --- a/components/hal/esp32s3/include/hal/uart_ll.h +++ b/components/hal/esp32s3/include/hal/uart_ll.h @@ -56,6 +56,18 @@ typedef enum { UART_INTR_CMD_CHAR_DET = (0x1 << 18), } uart_intr_t; +/** + * @brief Configure the UART core reset. + * + * @param hw Beginning address of the peripheral registers. + * @param core_rst_en True to enable the core reset, otherwise set it false. + * + * @return None. + */ +static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en) +{ + hw->clk_conf.rst_core = core_rst_en; +} /** * @brief Set the UART source clock. diff --git a/components/soc/esp32/include/soc/uart_channel.h b/components/soc/esp32/include/soc/uart_channel.h index 5b8dc56d5a..89c6a8956c 100644 --- a/components/soc/esp32/include/soc/uart_channel.h +++ b/components/soc/esp32/include/soc/uart_channel.h @@ -1,16 +1,10 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32. #ifndef _SOC_UART_CHANNEL_H #define _SOC_UART_CHANNEL_H diff --git a/components/soc/esp32c3/include/soc/uart_channel.h b/components/soc/esp32c3/include/soc/uart_channel.h index 855728262e..2711d7f9df 100644 --- a/components/soc/esp32c3/include/soc/uart_channel.h +++ b/components/soc/esp32c3/include/soc/uart_channel.h @@ -1,61 +1,21 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32C3. #ifndef _SOC_UART_CHANNEL_H #define _SOC_UART_CHANNEL_H //UART channels -#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1 -#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3 -#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19 -#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22 +#define UART_GPIO21_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 21 +#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 20 -#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL -#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL -#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL -#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL - -#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10 -#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9 -#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6 -#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11 - -#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL -#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL -#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL -#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL - -#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17 -#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16 -#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8 -#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7 - -#define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL -#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL -#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL -#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL +#define UART_TXD_GPIO21_DIRECT_CHANNEL UART_GPIO21_DIRECT_CHANNEL +#define UART_RXD_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL #endif diff --git a/components/soc/esp32s2/include/soc/uart_channel.h b/components/soc/esp32s2/include/soc/uart_channel.h index 5b8dc56d5a..ae5c84fb45 100644 --- a/components/soc/esp32s2/include/soc/uart_channel.h +++ b/components/soc/esp32s2/include/soc/uart_channel.h @@ -1,61 +1,41 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32S2. #ifndef _SOC_UART_CHANNEL_H #define _SOC_UART_CHANNEL_H //UART channels -#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1 -#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3 -#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19 -#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22 +#define UART_GPIO43_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 43 +#define UART_GPIO44_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 44 +#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 16 +#define UART_GPIO15_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 15 -#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL -#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL -#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL -#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL +#define UART_TXD_GPIO43_DIRECT_CHANNEL UART_GPIO43_DIRECT_CHANNEL +#define UART_RXD_GPIO44_DIRECT_CHANNEL UART_GPIO44_DIRECT_CHANNEL +#define UART_CTS_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL +#define UART_RTS_GPIO15_DIRECT_CHANNEL UART_GPIO15_DIRECT_CHANNEL -#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10 -#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9 -#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6 -#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11 - -#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL -#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL -#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL -#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL - -#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17 -#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16 -#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8 -#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7 +#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 17 +#define UART_GPIO18_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 18 +#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 20 +#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 19 #define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL -#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL -#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL -#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL +#define UART_RXD_GPIO18_DIRECT_CHANNEL UART_GPIO18_DIRECT_CHANNEL +#define UART_CTS_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL +#define UART_RTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL #endif diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index 42f834b22c..eb6ee1ca38 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -108,6 +108,7 @@ #define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */ #define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */ +#define SOC_UART_REQUIRE_CORE_RESET (1) /*--------------------------- SHA CAPS ---------------------------------------*/ /* Max amount of bytes in a single DMA operation is 4095, diff --git a/components/soc/esp32s3/include/soc/uart_channel.h b/components/soc/esp32s3/include/soc/uart_channel.h index 0475fd3b5f..1b8b41da00 100644 --- a/components/soc/esp32s3/include/soc/uart_channel.h +++ b/components/soc/esp32s3/include/soc/uart_channel.h @@ -1,58 +1,38 @@ -// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32S3. #pragma once //UART channels -#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1 -#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3 -#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19 -#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0 -#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22 +#define UART_GPIO43_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 43 +#define UART_GPIO44_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 44 +#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 16 +#define UART_GPIO15_DIRECT_CHANNEL UART_NUM_0 +#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 15 -#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL -#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL -#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL -#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL +#define UART_TXD_GPIO43_DIRECT_CHANNEL UART_GPIO43_DIRECT_CHANNEL +#define UART_RXD_GPIO44_DIRECT_CHANNEL UART_GPIO44_DIRECT_CHANNEL +#define UART_CTS_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL +#define UART_RTS_GPIO15_DIRECT_CHANNEL UART_GPIO15_DIRECT_CHANNEL -#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10 -#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9 -#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6 -#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1 -#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11 - -#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL -#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL -#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL -#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL - -#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17 -#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16 -#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8 -#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2 -#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7 +#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 17 +#define UART_GPIO18_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 18 +#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 20 +#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_1 +#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 19 #define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL -#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL -#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL -#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL +#define UART_RXD_GPIO18_DIRECT_CHANNEL UART_GPIO18_DIRECT_CHANNEL +#define UART_CTS_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL +#define UART_RTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL