soc: add base support for ESP32-S3

Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
This commit is contained in:
Marius Vikhammer
2021-06-02 12:14:13 +08:00
parent 0e68c222ac
commit 19a492bc8d
19 changed files with 4276 additions and 3887 deletions
@@ -6,11 +6,6 @@ idf_build_get_property(python PYTHON)
idf_build_get_property(idf_path IDF_PATH)
set(chip_model ${target})
if(target STREQUAL "esp32s3")
if(CONFIG_IDF_TARGET_ESP32S3_BETA_VERSION_3)
set(chip_model "esp32s3beta3")
endif()
endif()
set(ESPTOOLPY ${python} "$ENV{ESPTOOL_WRAPPER}" "${CMAKE_CURRENT_LIST_DIR}/esptool/esptool.py" --chip ${chip_model})
set(ESPSECUREPY ${python} "${CMAKE_CURRENT_LIST_DIR}/esptool/espsecure.py")