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ulp: set riscv-ulp as done signal source properly

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Closes https://github.com/espressif/esp-idf/issues/6069
This commit is contained in:
Renz Bagaporo
2021-01-11 17:35:56 +08:00
parent cf9ac2ef9e
commit 19d8a403e6
1 changed files with 3 additions and 2 deletions
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5
components/ulp/ulp_riscv.c
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@@ -44,8 +44,9 @@ esp_err_t ulp_riscv_run(void)
esp_rom_delay_us(20);
/* Select RISC-V as the ULP_TIMER trigger target. */
CLEAR_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SEL);
/* Select ULP_TIMER sleep trigger source. 1: REG_COCPU_DONE; 0: ULP END.*/
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_DONE);
/* Select ULP-RISC-V to send the DONE signal. */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_DONE_FORCE);
/* start ULP_TIMER */
CLEAR_PERI_REG_MASK(RTC_CNTL_ULP_CP_CTRL_REG, RTC_CNTL_ULP_CP_FORCE_START_TOP);