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fix(esp_hw_support): esp32h4 beta5 i2c config retention when pd modem refer to PM-487
This commit is contained in:
@@ -31,13 +31,15 @@ esp_err_t sleep_clock_system_retention_init(void *arg)
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#undef N_REGS_PCR
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#undef N_REGS_PCR
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}
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}
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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esp_err_t sleep_clock_modem_retention_init(void *arg)
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esp_err_t sleep_clock_modem_retention_init(void *arg)
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{
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{
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
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[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) } /* MODEM LPCON */
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};
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};
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esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_MODEM_CLK, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
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esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_MODEM_CLK, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
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@@ -45,6 +47,7 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
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ESP_LOGI(TAG, "Modem Power, Clock and Reset sleep retention initialization");
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ESP_LOGI(TAG, "Modem Power, Clock and Reset sleep retention initialization");
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return ESP_OK;
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return ESP_OK;
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#undef N_REGS_LPCON
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#undef N_REGS_SYSCON
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#undef N_REGS_SYSCON
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}
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}
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#endif
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#endif
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@@ -60,7 +63,7 @@ bool clock_domain_pd_allowed(void)
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* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
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* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
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* or off. The clock and reset of digital peripherals are managed through
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* or off. The clock and reset of digital peripherals are managed through
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* PCR, with TOP domain similar to MODEM domain. */
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* PCR, with TOP domain similar to MODEM domain. */
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sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
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__attribute__((unused)) sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
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#if SOC_BT_SUPPORTED
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#if SOC_BT_SUPPORTED
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
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modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
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@@ -83,7 +86,9 @@ bool clock_domain_pd_allowed(void)
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mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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}
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}
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#endif
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#endif
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#if SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
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#endif
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const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
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const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
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const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
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const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
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return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
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return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
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@@ -97,12 +102,21 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
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};
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM, &init_param);
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM, &init_param);
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE || SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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init_param = (sleep_retention_module_init_param_t) {
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init_param = (sleep_retention_module_init_param_t) {
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.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
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.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
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#if !SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
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.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
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#endif
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};
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};
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);
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sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);
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#endif
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#endif
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#if SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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if (sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_CLOCK_MODEM) != ESP_OK) {
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// even though the modem clock retention module create failed, sleep process can be executed without pd the modem domain, so just warning here
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ESP_LOGW(TAG, "create retention link failed on modem clock, modem power domain won't be turned off during sleep");
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}
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#endif
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return ESP_OK;
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return ESP_OK;
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}
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}
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@@ -923,6 +923,10 @@ config SOC_PM_MODEM_RETENTION_BY_REGDMA
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bool
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bool
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default y
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default y
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config SOC_PM_MODEM_CLK_RETENTION_WORKROUND
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bool
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default y
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config SOC_PM_PAU_LINK_NUM
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config SOC_PM_PAU_LINK_NUM
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int
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int
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default 4
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default 4
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@@ -533,7 +533,7 @@
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#define SOC_PM_CPU_RETENTION_BY_SW (1)
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#define SOC_PM_CPU_RETENTION_BY_SW (1)
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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// #define SOC_PM_RETENTION_SW_TRIGGER_REGDMA (1) /*!< In esp32H2, regdma will power off when entering sleep */
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#define SOC_PM_MODEM_CLK_RETENTION_WORKROUND (1) /*!< In esp32H4, i2c lpcon is placed in modem domain*/
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#define SOC_PM_PAU_LINK_NUM (4)
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#define SOC_PM_PAU_LINK_NUM (4)
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#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
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#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
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