Merge branch 'feat/new_xmc_id_v5.2' into 'release/v5.2'

feat(spi_flash): Add new xmc chip id (backport v5.2)

See merge request espressif/esp-idf!34285

components/bootloader_support/bootloader_flash/src/bootloader_flash.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -685,7 +685,7 @@ void bootloader_spi_flash_reset(void)
  ******************************************************************************/
 
 #define XMC_SUPPORT CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT
-#define XMC_VENDOR_ID 0x20
+#define XMC_VENDOR_ID_1 0x20
 
 #if BOOTLOADER_BUILD
 #define BOOTLOADER_FLASH_LOG(level, ...)    ESP_EARLY_LOG##level(TAG, ##__VA_ARGS__)
@@ -702,7 +702,7 @@ static IRAM_ATTR bool is_xmc_chip_strict(uint32_t rdid)
     uint32_t mfid = BYTESHIFT(rdid, 1);
     uint32_t cpid = BYTESHIFT(rdid, 0);
 
-    if (vendor_id != XMC_VENDOR_ID) {
+    if (vendor_id != XMC_VENDOR_ID_1) {
         return false;
     }
 
@@ -735,7 +735,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
     // Check the Manufacturer ID in SFDP registers (JEDEC standard). If not XMC chip, no need to run the flow
     const int sfdp_mfid_addr = 0x10;
     uint8_t mf_id = (bootloader_flash_read_sfdp(sfdp_mfid_addr, 1) & 0xff);
-    if (mf_id != XMC_VENDOR_ID) {
+    if (mf_id != XMC_VENDOR_ID_1) {
         BOOTLOADER_FLASH_LOG(D, "non-XMC chip detected by SFDP Read (%02X), skip.", mf_id);
         return ESP_OK;
     }
@@ -767,7 +767,7 @@ esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)
 static IRAM_ATTR bool is_xmc_chip(uint32_t rdid)
 {
     uint32_t vendor_id = (rdid >> 16) & 0xFF;
-    return (vendor_id == XMC_VENDOR_ID);
+    return (vendor_id == XMC_VENDOR_ID_1);
 }
 
 esp_err_t IRAM_ATTR bootloader_flash_xmc_startup(void)

components/spi_flash/Kconfig

@@ -40,7 +40,7 @@ menu "Main Flash configuration"
             default SPI_FLASH_HPM_AUTO
             help
                 Whether the High Performance Mode of Flash is enabled. As an optional feature, user needs to manually
-                enable this option as a confirmation. To be back-compatible with earlier IDF versionn, this option is
+                enable this option as a confirmation. To be back-compatible with earlier IDF version, this option is
                 automatically enabled with warning when Flash running > 80Mhz.
 
             config SPI_FLASH_HPM_ENA
@@ -108,6 +108,17 @@ menu "Main Flash configuration"
                 Also refer to `Concurrency Constraints for Flash on SPI1` > `Flash Auto Suspend Feature`
                 before enabling this option.
 
+        config SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
+            bool "Enable XMC-C series flash chip suspend feature anyway"
+            default n
+            help
+                XMC-C series is regarded as not qualified for the Suspend feature, since its specification
+                has a tRS >= 1ms restriction. We strongly do not suggest using it for the Suspend feature.
+                However, if your product in field has enabled this feature, you may still enable this
+                config option to keep the legacy behavior.
+
+                For new users, DO NOT enable this config.
+
     endmenu
 endmenu
 
@@ -242,7 +253,7 @@ menu "SPI Flash driver"
             Please use this configuration together with ``SPI_FLASH_ERASE_YIELD_DURATION_MS`` and
             ``SPI_FLASH_ERASE_YIELD_TICKS`` after carefully checking flash datasheet to avoid a
             watchdog timeout.
-            For more information, please check `SPI Flash API` reference documenation
+            For more information, please check `SPI Flash API` reference documentation
             under section `OS Function`.
 
     config SPI_FLASH_ERASE_YIELD_DURATION_MS
@@ -344,7 +355,7 @@ menu "SPI Flash driver"
 
         config SPI_FLASH_SUPPORT_BOYA_CHIP
             bool "BOYA"
-            # ESP32 doens't usually use this chip, default n to save iram.
+            # ESP32 doesn't usually use this chip, default n to save iram.
             default y if SPI_FLASH_VENDOR_BOYA_SUPPORTED
             default n
             help
@@ -354,7 +365,7 @@ menu "SPI Flash driver"
 
         config SPI_FLASH_SUPPORT_TH_CHIP
             bool "TH"
-            # ESP32 doens't usually use this chip, default n to save iram.
+            # ESP32 doesn't usually use this chip, default n to save iram.
             default y if SPI_FLASH_VENDOR_TH_SUPPORTED
             default n
             help

components/spi_flash/include/spi_flash/spi_flash_defs.h

@@ -53,6 +53,8 @@
 #define CMD_RST_EN      0x66
 #define CMD_RST_DEV     0x99
 
+#define CMD_RDSFDP     0x5A /* Read the SFDP of the flash */
+
 #define SPI_FLASH_DIO_ADDR_BITLEN       24
 #define SPI_FLASH_DIO_DUMMY_BITLEN      4
 #define SPI_FLASH_QIO_ADDR_BITLEN       24

components/spi_flash/spi_flash_chip_generic.c

@@ -510,7 +510,7 @@ esp_err_t spi_flash_chip_generic_write_encrypted(esp_flash_t *chip, const void *
         return ESP_ERR_NOT_SUPPORTED;
     }
 
-    /* Check if the buffer and length can qualify the requirments */
+    /* Check if the buffer and length can qualify the requirements */
     if (esp_flash_encryption->flash_encryption_check(address, length) != true) {
         return ESP_ERR_NOT_SUPPORTED;
     }
@@ -599,8 +599,39 @@ spi_flash_caps_t spi_flash_chip_generic_get_caps(esp_flash_t *chip)
     // 32M-bits address support
 
     // flash suspend support
-    // Only `XMC` support suspend for now.
+    // XMC-D support suspend
+    if (chip->chip_id >> 16 == 0x46) {
+        caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
+    }
+
+    // XMC-D support suspend (some D series flash chip begin with 0x20, difference checked by SFDP)
     if (chip->chip_id >> 16 == 0x20) {
+        uint8_t data = 0;
+        spi_flash_trans_t t = {
+            .command = CMD_RDSFDP,
+            .address_bitlen = 24,
+            .address = 0x32,
+            .mosi_len = 0,
+            .mosi_data = 0,
+            .miso_len = 1,
+            .miso_data = &data,
+            .dummy_bitlen = 8,
+        };
+        chip->host->driver->common_command(chip->host, &t);
+        if((data & 0x8) == 0x8) {
+            caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
+        }
+    }
+
+#if CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND
+    // XMC-C suspend has big risk. But can enable this anyway.
+    if (chip->chip_id >> 16 == 0x20) {
+        caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
+    }
+#endif
+
+    // FM support suspend
+    if (chip->chip_id >> 16 == 0xa1) {
         caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
     }
     // flash read unique id.

components/spi_flash/spi_flash_hpm_enable.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -115,7 +115,7 @@ static void spi_flash_enable_high_performance_send_cmd(void)
 {
     uint32_t dummy = 24;
     bootloader_flash_execute_command_common(CMD_HPMEN, 0, 0, dummy, 0, 0, 0);
-    // Delay for T(HPM) refering to datasheet.
+    // Delay for T(HPM) referring to datasheet.
     esp_rom_delay_us(20);
 }
 
@@ -150,6 +150,8 @@ static esp_err_t spi_flash_hpm_probe_chip_with_dummy(uint32_t flash_id)
     // XMC chips.
     case 0x204017:
     case 0x204018:
+    case 0x464017:
+    case 0x464018:
         break;
     // GD chips.
     case 0xC84017:
@@ -431,7 +433,7 @@ bool spi_flash_hpm_dummy_adjust(void)
 //-----------------------generic functions-------------------------------------//
 
 /**
- * @brief Default dummy for almost all flash chips. If your flash does't need to reconfigure dummy,
+ * @brief Default dummy for almost all flash chips. If your flash doesn't need to reconfigure dummy,
  *        just call this function.
  */
 void __attribute__((weak)) spi_flash_hpm_get_dummy_generic(spi_flash_hpm_dummy_conf_t *dummy_conf)

docs/en/migration-guides/release-5.x/5.2/storage.rst

@@ -9,3 +9,8 @@ NVS Encryption
 - For SoCs with the HMAC peripheral (``SOC_HMAC_SUPPORTED``), turning on :doc:`../../../security/flash-encryption` will no longer automatically turn on :doc:`../../../api-reference/storage/nvs_encryption`.
 - You will need to explicitly turn on NVS encryption and select the required scheme (flash encryption-based or HMAC peripheral-based). You can select the HMAC peripheral-based scheme (:ref:`CONFIG_NVS_SEC_KEY_PROTECTION_SCHEME`), even if flash encryption is not enabled.
 - SoCs without the HMAC peripheral will still automatically turn on NVS encryption when flash encryption is enabled.
+
+SPI Flash Driver
+^^^^^^^^^^^^^^^^
+
+XMC-C series flash suspend support has been removed. According to feedback from the flash manufacturer, in some situations the XMC-C flash would require a 1ms interval between resume and next command. This is too long for a software request. Based on the above reason, in order to use suspend safely, we decide to remove flash suspend support from XMC-C series. But you can still force enable it via `CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND`. If you have any questions, please contact espressif business support.

docs/zh_CN/migration-guides/release-5.x/5.2/storage.rst

@@ -9,3 +9,8 @@ NVS 加密
 - 在集成 HMAC 外设 (``SOC_HMAC_SUPPORTED``) 的 SoC 上，启用 :doc:`../../../security/flash-encryption` 时将不再自动启用 :doc:`../../../api-reference/storage/nvs_encryption`。
 - 因此需显式启用 NVS 加密，并按照需要选择基于 flash 加密或基于 HMAC 外设的方案。即使未启用 flash 加密，也可选择基于 HMAC 外设的方案 (:ref:`CONFIG_NVS_SEC_KEY_PROTECTION_SCHEME`)。
 - 启用 flash 加密后，未集成 HMAC 外设的 SoC 仍会自动启用 NVS 加密。
+
+SPI flash 驱动
+^^^^^^^^^^^^^^^^^^^^^^
+
+XMC-C 系列闪存 suspend 功能的支持已被移除。根据闪存制造商的反馈，在某些情况下，XMC-C 闪存需要在 resume 和下一条命令之间间隔 1 毫秒。这对于软件请求来说时间太长。基于上述原因，为了安全使用 suspend 功能，我们决定取消对 XMC-C 系列闪存挂起的支持。但是你依旧可以通过打开 `CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND` 来强行使能这个功能。如果您有任何疑问，请联系 espressif 商务支持。