diff --git a/components/driver/i2c.c b/components/driver/i2c.c index c67b3521ee..a806729a8e 100644 --- a/components/driver/i2c.c +++ b/components/driver/i2c.c @@ -1343,6 +1343,7 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat return ret; } +__attribute__((always_inline)) static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) { return cmd->total_bytes == 1; } diff --git a/components/hal/esp32/include/hal/i2c_ll.h b/components/hal/esp32/include/hal/i2c_ll.h index af94151cf0..93a49c4711 100644 --- a/components/hal/esp32/include/hal/i2c_ll.h +++ b/components/hal/esp32/include/hal/i2c_ll.h @@ -237,6 +237,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -292,6 +293,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -456,6 +458,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -468,6 +471,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -492,6 +496,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -551,6 +556,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -568,6 +574,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -616,6 +623,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -629,6 +637,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -642,6 +651,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -654,6 +664,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -666,6 +677,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -678,6 +690,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -714,6 +727,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -738,6 +752,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -803,6 +818,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -829,6 +845,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -884,6 +901,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32 do not support diff --git a/components/hal/esp32c3/include/hal/i2c_ll.h b/components/hal/esp32c3/include/hal/i2c_ll.h index b796022860..6b2111d5ba 100644 --- a/components/hal/esp32c3/include/hal/i2c_ll.h +++ b/components/hal/esp32c3/include/hal/i2c_ll.h @@ -133,6 +133,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -258,6 +259,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -313,6 +315,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -477,6 +480,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rx_fifo_cnt; @@ -489,6 +493,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt; @@ -513,6 +518,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -572,6 +578,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -588,6 +595,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -636,6 +644,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -649,6 +658,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -662,6 +672,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -674,6 +685,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -686,6 +698,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -698,6 +711,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -734,6 +748,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -758,6 +773,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ + __attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -830,6 +846,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -856,6 +873,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/esp32h2/include/hal/i2c_ll.h b/components/hal/esp32h2/include/hal/i2c_ll.h index 7ef4b9547d..8b32d5ec93 100644 --- a/components/hal/esp32h2/include/hal/i2c_ll.h +++ b/components/hal/esp32h2/include/hal/i2c_ll.h @@ -133,6 +133,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -258,6 +259,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -313,6 +315,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -477,6 +480,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rx_fifo_cnt; @@ -489,6 +493,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt; @@ -513,6 +518,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -572,6 +578,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -588,6 +595,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -636,6 +644,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -649,6 +658,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -662,6 +672,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -674,6 +685,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -686,6 +698,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -698,6 +711,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -734,6 +748,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -758,6 +773,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ + __attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -827,6 +843,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -853,6 +870,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/esp32s2/include/hal/i2c_ll.h b/components/hal/esp32s2/include/hal/i2c_ll.h index 94f99116ad..b77de4bc97 100644 --- a/components/hal/esp32s2/include/hal/i2c_ll.h +++ b/components/hal/esp32s2/include/hal/i2c_ll.h @@ -223,6 +223,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -279,6 +280,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -443,6 +445,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -455,6 +458,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -479,6 +483,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -538,6 +543,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -555,6 +561,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -604,6 +611,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -617,6 +625,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -630,6 +639,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -642,6 +652,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -654,6 +665,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -666,6 +678,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -702,6 +715,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -726,6 +740,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -794,6 +809,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -820,6 +836,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -893,6 +910,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32S2 do not support diff --git a/components/hal/esp32s3/include/hal/i2c_ll.h b/components/hal/esp32s3/include/hal/i2c_ll.h index 617e9f3856..16d4024da3 100644 --- a/components/hal/esp32s3/include/hal/i2c_ll.h +++ b/components/hal/esp32s3/include/hal/i2c_ll.h @@ -128,6 +128,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -271,6 +272,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -326,6 +328,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { _Static_assert(sizeof(i2c_comd0_reg_t) == sizeof(i2c_hw_cmd_t), @@ -493,6 +496,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rxfifo_cnt; @@ -505,6 +509,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.txfifo_cnt; @@ -529,6 +534,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -604,6 +610,7 @@ static inline void i2c_ll_get_scl_clk_timing(i2c_dev_t *hw, int *high_period, in * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -620,6 +627,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -668,6 +676,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -681,6 +690,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -694,6 +704,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -706,6 +717,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -718,6 +730,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -730,6 +743,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -766,6 +780,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -790,6 +805,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -858,6 +874,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -884,6 +901,8 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ + +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/i2c_hal.c b/components/hal/i2c_hal.c index 80d194bd94..eff131a69e 100644 --- a/components/hal/i2c_hal.c +++ b/components/hal/i2c_hal.c @@ -56,11 +56,6 @@ void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask) i2c_ll_disable_intr_mask(hal->dev, mask); } -void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) -{ - *mask = i2c_ll_get_intsts_mask(hal->dev); -} - void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en) { i2c_ll_set_fifo_mode(hal->dev, fifo_mode_en); diff --git a/components/hal/i2c_hal_iram.c b/components/hal/i2c_hal_iram.c index 303fda4546..86ec120940 100644 --- a/components/hal/i2c_hal_iram.c +++ b/components/hal/i2c_hal_iram.c @@ -60,3 +60,8 @@ void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len) { *len = i2c_ll_get_txfifo_len(hal->dev); } + +void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) +{ + *mask = i2c_ll_get_intsts_mask(hal->dev); +}