diff --git a/components/bootloader_support/src/esp32c61/bootloader_soc.c b/components/bootloader_support/src/esp32c61/bootloader_soc.c
index 4c5f7430da..52e2d9dd22 100644
--- a/components/bootloader_support/src/esp32c61/bootloader_soc.c
+++ b/components/bootloader_support/src/esp32c61/bootloader_soc.c
@@ -32,4 +32,4 @@ void bootloader_power_glitch_reset_config(bool enable)
     } else {
         REG_SET_FIELD(LP_ANA_POWER_GLITCH_CNTL_REG, LP_ANA_POWER_GLITCH_RESET_ENA, 0);
     }
-}
\ No newline at end of file
+}
diff --git a/components/esp_hw_support/port/esp32c61/rtc_clk_init.c b/components/esp_hw_support/port/esp32c61/rtc_clk_init.c
index 3ea08d3375..965fabc705 100644
--- a/components/esp_hw_support/port/esp32c61/rtc_clk_init.c
+++ b/components/esp_hw_support/port/esp32c61/rtc_clk_init.c
@@ -78,6 +78,8 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_SCK_DCAP, cfg.slow_clk_dcap);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_RTC_DREG, 1);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_ENIF_DIG_DREG, 1);
+    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_DIG_REG, 0);
+    REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_XPD_RTC_REG, 0);
 
     uint32_t hp_cali_dbias = get_act_hp_dbias();
     uint32_t lp_cali_dbias = get_act_lp_dbias();