diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig
index f339154bcf..665e5d76ae 100644
--- a/components/esp_hw_support/Kconfig
+++ b/components/esp_hw_support/Kconfig
@@ -100,18 +100,6 @@ menu "Hardware Settings"
                 make use of the internal ones.
     endmenu
 
-    menu "ESP_SLEEP_WORKAROUND"
-        # No visible menu/configs for workaround
-        visible if 0
-        config ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
-            bool "ESP32C3 SYSTIMER Stall Issue Workaround"
-            depends on IDF_TARGET_ESP32C3
-            help
-                Its not able to stall ESP32C3 systimer in sleep.
-                To fix related RTOS TICK issue, select it to disable related systimer during sleep.
-                TODO: IDF-7036
-    endmenu
-
     menu "RTC Clock Config"
         # This is used for configure the RTC clock.
         config RTC_CLOCK_BBPLL_POWER_ON_WITH_USB
diff --git a/components/esp_hw_support/port/esp32c3/rtc_sleep.c b/components/esp_hw_support/port/esp32c3/rtc_sleep.c
index 6ef6bfd065..d73010ca59 100644
--- a/components/esp_hw_support/port/esp32c3/rtc_sleep.c
+++ b/components/esp_hw_support/port/esp32c3/rtc_sleep.c
@@ -25,7 +25,7 @@
 #include "regi2c_ctrl.h"
 #include "esp_efuse.h"
 #include "hal/efuse_hal.h"
-#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
+#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
 #include "soc/systimer_reg.h"
 #endif
 
@@ -259,17 +259,6 @@ void rtc_sleep_set_wakeup_time(uint64_t t)
     WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
 }
 
-#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
-void rtc_sleep_systimer_enable(bool en)
-{
-    if (en) {
-        REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
-    } else {
-        REG_CLR_BIT(SYSTIMER_CONF_REG, SYSTIMER_TIMER_UNIT1_WORK_EN);
-    }
-}
-#endif
-
 static uint32_t rtc_sleep_finish(uint32_t lslp_mem_inf_fpu);
 
 uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu)
diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index 25e1411045..0e0aec220e 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -25,6 +25,15 @@
 #include "driver/rtc_io.h"
 #include "hal/rtc_io_hal.h"
 
+#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
+#include "hal/systimer_ll.h"
+#endif
+
+#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
+#include "hal/mwdt_ll.h"
+#include "hal/timer_ll.h"
+#endif
+
 #include "driver/uart.h"
 
 #include "soc/cpu.h"
@@ -286,6 +295,52 @@ void esp_deep_sleep(uint64_t time_in_us)
     esp_deep_sleep_start();
 }
 
+#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
+static uint32_t s_stopped_tgwdt_bmap = 0;
+#endif
+
+// Must be called from critical sections.
+static void IRAM_ATTR suspend_timers(uint32_t pd_flags) {
+    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
+#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
+        /* If timegroup implemented task watchdog or interrupt watchdog is running, we have to stop it. */
+        for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) {
+            if (mwdt_ll_check_if_enabled(TIMER_LL_GET_HW(tg_num))) {
+                mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
+                mwdt_ll_disable(TIMER_LL_GET_HW(tg_num));
+                mwdt_ll_write_protect_enable(TIMER_LL_GET_HW(tg_num));
+                s_stopped_tgwdt_bmap |= BIT(tg_num);
+            }
+        }
+#endif
+#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
+        for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
+            systimer_ll_enable_counter(&SYSTIMER, counter_id, false);
+        }
+#endif
+    }
+}
+
+// Must be called from critical sections.
+static void IRAM_ATTR resume_timers(uint32_t pd_flags) {
+    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
+#if SOC_SLEEP_SYSTIMER_STALL_WORKAROUND
+        for (uint32_t counter_id = 0; counter_id < SOC_SYSTIMER_COUNTER_NUM; ++counter_id) {
+            systimer_ll_enable_counter(&SYSTIMER, counter_id, true);
+        }
+#endif
+#if SOC_SLEEP_TGWDT_STOP_WORKAROUND
+        for (uint32_t tg_num = 0; tg_num < SOC_TIMER_GROUPS; ++tg_num) {
+            if (s_stopped_tgwdt_bmap & BIT(tg_num)) {
+                mwdt_ll_write_protect_disable(TIMER_LL_GET_HW(tg_num));
+                mwdt_ll_enable(TIMER_LL_GET_HW(tg_num));
+                mwdt_ll_write_protect_enable(TIMER_LL_GET_HW(tg_num));
+            }
+        }
+#endif
+    }
+}
+
 // [refactor-todo] provide target logic for body of uart functions below
 static void IRAM_ATTR flush_uarts(void)
 {
@@ -530,11 +585,6 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
         timer_wakeup_prepare();
     }
 
-#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
-    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
-        rtc_sleep_systimer_enable(false);
-    }
-#endif
 
     uint32_t result;
     if (deep_sleep) {
@@ -564,19 +614,15 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
 #endif
 #endif // SOC_PM_SUPPORT_DEEPSLEEP_VERIFY_STUB_ONLY
     } else {
+        suspend_timers(pd_flags);
         uint32_t cache_state;
         uint32_t cpuid = cpu_ll_get_core_id();
         spi_flash_disable_cache(cpuid, &cache_state);
         result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu);
         spi_flash_restore_cache(cpuid, cache_state);
+        resume_timers(pd_flags);
     }
 
-#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
-    if (!(pd_flags & RTC_SLEEP_PD_XTAL)) {
-        rtc_sleep_systimer_enable(true);
-    }
-#endif
-
     // Restore CPU frequency
     rtc_clk_cpu_freq_set_config(&cpu_freq_config);
 
diff --git a/components/esp_timer/src/esp_timer_impl_systimer.c b/components/esp_timer/src/esp_timer_impl_systimer.c
index b279ab213d..24c540ef08 100644
--- a/components/esp_timer/src/esp_timer_impl_systimer.c
+++ b/components/esp_timer/src/esp_timer_impl_systimer.c
@@ -122,6 +122,10 @@ esp_err_t esp_timer_impl_early_init(void)
     systimer_hal_select_alarm_mode(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_ALARM_MODE_ONESHOT);
     systimer_hal_connect_alarm_counter(&systimer_hal, SYSTIMER_LL_ALARM_CLOCK, SYSTIMER_LL_COUNTER_CLOCK);
 
+    for (unsigned cpuid = 0; cpuid < SOC_CPU_CORES_NUM; ++cpuid) {
+        systimer_hal_counter_can_stall_by_cpu(&systimer_hal, SYSTIMER_LL_COUNTER_CLOCK, cpuid, (cpuid < portNUM_PROCESSORS) ? true : false);
+    }
+
     return ESP_OK;
 }
 
diff --git a/components/soc/esp32c3/include/soc/rtc.h b/components/soc/esp32c3/include/soc/rtc.h
index 03fb95e124..002631bdf1 100644
--- a/components/soc/esp32c3/include/soc/rtc.h
+++ b/components/soc/esp32c3/include/soc/rtc.h
@@ -738,18 +738,6 @@ void rtc_sleep_low_init(uint32_t slowclk_period);
  */
 void rtc_sleep_set_wakeup_time(uint64_t t);
 
-#if CONFIG_ESP_SLEEP_SYSTIMER_STALL_WORKAROUND
-/**
- * @brief Configure systimer for esp32c3 systimer stall issue workaround
- *
- * This function configures related systimer for esp32c3 systimer stall issue.
- * Only apply workaround when xtal powered up.
- *
- * @param en enable systimer or not
- */
-void rtc_sleep_systimer_enable(bool en);
-#endif
-
 #define RTC_GPIO_TRIG_EN            BIT(2)  //!< GPIO wakeup
 #define RTC_TIMER_TRIG_EN           BIT(3)  //!< Timer wakeup
 #define RTC_WIFI_TRIG_EN            BIT(5)  //!< WIFI wakeup (light sleep only)
diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h
index 430bfd0925..6dc769d8c9 100644
--- a/components/soc/esp32c3/include/soc/soc_caps.h
+++ b/components/soc/esp32c3/include/soc/soc_caps.h
@@ -178,6 +178,9 @@
 
 #define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256       (1)
 
+#define SOC_SLEEP_SYSTIMER_STALL_WORKAROUND     (1)
+#define SOC_SLEEP_TGWDT_STOP_WORKAROUND         (1)
+
 /*-------------------------- RTCIO CAPS --------------------------------------*/
 /* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
  * for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */