From 200dcce5350a93f5633a341e0ce5bcc0b2e11fff Mon Sep 17 00:00:00 2001 From: jingli Date: Fri, 23 Dec 2022 17:27:36 +0800 Subject: [PATCH] soc_caps: remove SOC_GPIO_SUPPORT_SLP_SWITCH all esp chips support this feature --- components/driver/gpio.c | 10 ++++------ components/driver/include/driver/gpio.h | 2 -- components/driver/include/esp_private/gpio.h | 2 -- .../esp_hw_support/include/esp_private/sleep_gpio.h | 4 ++-- components/esp_hw_support/include/esp_sleep.h | 2 -- components/esp_hw_support/sleep_gpio.c | 4 ---- components/esp_pm/pm_impl.c | 4 ++-- components/hal/include/hal/gpio_hal.h | 2 -- components/soc/esp32/include/soc/soc_caps.h | 3 --- components/soc/esp32c3/include/soc/soc_caps.h | 3 --- components/soc/esp32h2/include/soc/soc_caps.h | 3 --- components/soc/esp32s2/include/soc/soc_caps.h | 3 --- components/soc/esp32s3/include/soc/soc_caps.h | 3 --- 13 files changed, 8 insertions(+), 37 deletions(-) diff --git a/components/driver/gpio.c b/components/driver/gpio.c index 1b88af4965..9bf0e2b078 100644 --- a/components/driver/gpio.c +++ b/components/driver/gpio.c @@ -562,7 +562,7 @@ esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) #endif portENTER_CRITICAL(&gpio_context.gpio_spinlock); gpio_hal_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type); -#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND +#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num); #endif portEXIT_CRITICAL(&gpio_context.gpio_spinlock); @@ -585,7 +585,7 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num) #endif portENTER_CRITICAL(&gpio_context.gpio_spinlock); gpio_hal_wakeup_disable(gpio_context.gpio_hal, gpio_num); -#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND +#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num); #endif portEXIT_CRITICAL(&gpio_context.gpio_spinlock); @@ -723,7 +723,6 @@ void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv) gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)oen_inv); } -#if SOC_GPIO_SUPPORT_SLP_SWITCH static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num) { GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG); @@ -895,7 +894,6 @@ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num) return ESP_OK; } #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL -#endif // SOC_GPIO_SUPPORT_SLP_SWITCH #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) @@ -910,7 +908,7 @@ esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t int } portENTER_CRITICAL(&gpio_context.gpio_spinlock); gpio_hal_deepsleep_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type); -#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND +#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num); #endif portEXIT_CRITICAL(&gpio_context.gpio_spinlock); @@ -925,7 +923,7 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num) } portENTER_CRITICAL(&gpio_context.gpio_spinlock); gpio_hal_deepsleep_wakeup_disable(gpio_context.gpio_hal, gpio_num); -#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND +#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num); #endif portEXIT_CRITICAL(&gpio_context.gpio_spinlock); diff --git a/components/driver/include/driver/gpio.h b/components/driver/include/driver/gpio.h index b6184329b3..90723c2100 100644 --- a/components/driver/include/driver/gpio.h +++ b/components/driver/include/driver/gpio.h @@ -449,7 +449,6 @@ esp_err_t gpio_force_hold_all(void); esp_err_t gpio_force_unhold_all(void); #endif -#if SOC_GPIO_SUPPORT_SLP_SWITCH /** * @brief Enable SLP_SEL to change GPIO status automantically in lightsleep. * @param gpio_num GPIO number of the pad. @@ -496,7 +495,6 @@ esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode); * - ESP_ERR_INVALID_ARG : Parameter error */ esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull); -#endif #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP diff --git a/components/driver/include/esp_private/gpio.h b/components/driver/include/esp_private/gpio.h index c4227dc8c4..65211a5e4e 100644 --- a/components/driver/include/esp_private/gpio.h +++ b/components/driver/include/esp_private/gpio.h @@ -12,7 +12,6 @@ #include "soc/soc_caps.h" #include "driver/gpio.h" -#if SOC_GPIO_SUPPORT_SLP_SWITCH #if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL /** * @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information @@ -34,4 +33,3 @@ esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num); */ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num); #endif -#endif diff --git a/components/esp_hw_support/include/esp_private/sleep_gpio.h b/components/esp_hw_support/include/esp_private/sleep_gpio.h index abab21871a..493687ec32 100644 --- a/components/esp_hw_support/include/esp_private/sleep_gpio.h +++ b/components/esp_hw_support/include/esp_private/sleep_gpio.h @@ -18,7 +18,7 @@ extern "C" { * This file contains declarations of GPIO related functions in light sleep mode. */ -#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL +#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL /** * @brief Save GPIO pull-up and pull-down configuration information in the wake-up state @@ -39,7 +39,7 @@ void gpio_sleep_mode_config_apply(void); */ void gpio_sleep_mode_config_unapply(void); -#endif // SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL +#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL #ifdef __cplusplus } diff --git a/components/esp_hw_support/include/esp_sleep.h b/components/esp_hw_support/include/esp_sleep.h index 6a1548dd06..1c1b51d351 100644 --- a/components/esp_hw_support/include/esp_sleep.h +++ b/components/esp_hw_support/include/esp_sleep.h @@ -458,7 +458,6 @@ void esp_deep_sleep_disable_rom_logging(void); esp_err_t esp_sleep_cpu_pd_low_init(bool enable); #endif -#if SOC_GPIO_SUPPORT_SLP_SWITCH /** * @brief Configure to isolate all GPIO pins in sleep state */ @@ -469,7 +468,6 @@ void esp_sleep_config_gpio_isolate(void); * @param enable decide whether to switch status or not */ void esp_sleep_enable_gpio_switch(bool enable); -#endif #if CONFIG_MAC_BB_PD /** diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c index 9a092b19fe..0b83baae6c 100644 --- a/components/esp_hw_support/sleep_gpio.c +++ b/components/esp_hw_support/sleep_gpio.c @@ -25,8 +25,6 @@ static const char *TAG = "sleep"; -#if SOC_GPIO_SUPPORT_SLP_SWITCH - #if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL void gpio_sleep_mode_config_apply(void) { @@ -95,8 +93,6 @@ void esp_sleep_enable_gpio_switch(bool enable) } } -#endif // SOC_GPIO_SUPPORT_SLP_SWITCH - // IDF does not officially support esp32h2 in v4.4 #if !CONFIG_IDF_TARGET_ESP32H2 IRAM_ATTR void esp_sleep_isolate_digital_gpio(void) diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c index 239390789e..7acab23946 100644 --- a/components/esp_pm/pm_impl.c +++ b/components/esp_pm/pm_impl.c @@ -301,7 +301,7 @@ esp_err_t esp_pm_configure(const void* vconfig) s_config_changed = true; portEXIT_CRITICAL(&s_switch_lock); -#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH +#if CONFIG_PM_SLP_DISABLE_GPIO esp_sleep_enable_gpio_switch(config->light_sleep_enable); #endif @@ -737,7 +737,7 @@ void esp_pm_impl_init(void) esp_pm_trace_init(); #endif -#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH +#if CONFIG_PM_SLP_DISABLE_GPIO esp_sleep_config_gpio_isolate(); #endif ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos0", diff --git a/components/hal/include/hal/gpio_hal.h b/components/hal/include/hal/gpio_hal.h index 258c6c1f08..5a3ce27b0b 100644 --- a/components/hal/include/hal/gpio_hal.h +++ b/components/hal/include/hal/gpio_hal.h @@ -374,7 +374,6 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, gpio_num_t gpio_num); #define gpio_hal_force_unhold_all() gpio_ll_force_unhold_all() #endif -#if SOC_GPIO_SUPPORT_SLP_SWITCH /** * @brief Enable pull-up on GPIO when system sleep. * @@ -472,7 +471,6 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, gpio_num_t gpio_n */ void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, gpio_num_t gpio_num); #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL -#endif //SOC_GPIO_SUPPORT_SLP_SWITCH #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index b2b5a7e68c..f69caf8880 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -134,9 +134,6 @@ // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM: 1, 3, 5, 6, 7, 8, 9, 10, 11, 16, 17, 18, 19, 21, 22, 23) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0xEF0FEAULL -// Support to configure slept status -#define SOC_GPIO_SUPPORT_SLP_SWITCH (1) - /*-------------------------- I2C CAPS ----------------------------------------*/ // ESP32 have 2 I2C. #define SOC_I2C_NUM (2) diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 520a6be6ef..f5e9808586 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -119,9 +119,6 @@ // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL -// Support to configure sleep status -#define SOC_GPIO_SUPPORT_SLP_SWITCH (1) - /*-------------------------- Dedicated GPIO CAPS -----------------------------*/ #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 964f18cd27..b317354c50 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -105,9 +105,6 @@ // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_40) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x000001FFFFFFFFC0ULL -// Support to configure sleep status -#define SOC_GPIO_SUPPORT_SLP_SWITCH (1) - /*-------------------------- Dedicated GPIO CAPS -----------------------------*/ #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index a01cf422a9..a259ea45a1 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -117,9 +117,6 @@ // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_46) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00007FFFFC000000ULL -// Support to configure slept status -#define SOC_GPIO_SUPPORT_SLP_SWITCH (1) - /*-------------------------- Dedicated GPIO CAPS ---------------------------------------*/ #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index d34b39bf27..795a6f4ce3 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -116,9 +116,6 @@ // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_48) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0001FFFFFC000000ULL -// Support to configure slept status -#define SOC_GPIO_SUPPORT_SLP_SWITCH (1) - /*-------------------------- Dedicated GPIO CAPS -----------------------------*/ #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */