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Merge branch 'bugfix/fix_i2s_24b_buf_size_calc_v5.1' into 'release/v5.1'

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fix(i2s): fixed some issues in I2S driver (v5.1)

See merge request espressif/esp-idf!35771
This commit is contained in:
morris
2024-12-24 22:01:27 +08:00
parent 509be3d12d 26f97d8d4d
commit 2249f2c916
23 changed files with 64 additions and 29 deletions
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4
components/driver/i2s/i2s_common.c
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@@ -356,7 +356,11 @@ err:
uint32_t i2s_get_buf_size(i2s_chan_handle_t handle, uint32_t data_bit_width, uint32_t dma_frame_num) uint32_t i2s_get_buf_size(i2s_chan_handle_t handle, uint32_t data_bit_width, uint32_t dma_frame_num)
{ {
uint32_t active_chan = handle->active_slot; uint32_t active_chan = handle->active_slot;
#if CONFIG_IDF_TARGET_ESP32
uint32_t bytes_per_sample = ((data_bit_width + 15) / 16) * 2; uint32_t bytes_per_sample = ((data_bit_width + 15) / 16) * 2;
#else
uint32_t bytes_per_sample = (data_bit_width + 7) / 8;
#endif // CONFIG_IDF_TARGET_ESP32
uint32_t bytes_per_frame = bytes_per_sample * active_chan; uint32_t bytes_per_frame = bytes_per_sample * active_chan;
uint32_t bufsize = dma_frame_num * bytes_per_frame; uint32_t bufsize = dma_frame_num * bytes_per_frame;
/* Limit DMA buffer size if it is out of range (DMA buffer limitation is 4092 bytes) */ /* Limit DMA buffer size if it is out of range (DMA buffer limitation is 4092 bytes) */

10
components/driver/i2s/i2s_pdm.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -43,8 +43,8 @@ static esp_err_t i2s_pdm_tx_calculate_clock(i2s_chan_handle_t handle, const i2s_
clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk); clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk);
clk_info->mclk_div = clk_info->sclk / clk_info->mclk; clk_info->mclk_div = clk_info->sclk / clk_info->mclk;
/* Check if the configuration is correct */ /* Check if the configuration is correct. Use float for check in case the mclk division might be carried up in the fine division calculation */
ESP_RETURN_ON_FALSE(clk_info->mclk_div, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large"); ESP_RETURN_ON_FALSE(clk_info->sclk / (float)clk_info->mclk > 1.99, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large");
/* Set up sampling configuration */ /* Set up sampling configuration */
i2s_ll_tx_set_pdm_fpfs(handle->controller->hal.dev, pdm_tx_clk->up_sample_fp, pdm_tx_clk->up_sample_fs); i2s_ll_tx_set_pdm_fpfs(handle->controller->hal.dev, pdm_tx_clk->up_sample_fp, pdm_tx_clk->up_sample_fs);
i2s_ll_tx_set_pdm_over_sample_ratio(handle->controller->hal.dev, over_sample_ratio); i2s_ll_tx_set_pdm_over_sample_ratio(handle->controller->hal.dev, over_sample_ratio);
@@ -329,8 +329,8 @@ static esp_err_t i2s_pdm_rx_calculate_clock(i2s_chan_handle_t handle, const i2s_
clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk); clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk);
clk_info->mclk_div = clk_info->sclk / clk_info->mclk; clk_info->mclk_div = clk_info->sclk / clk_info->mclk;
/* Check if the configuration is correct */ /* Check if the configuration is correct. Use float for check in case the mclk division might be carried up in the fine division calculation */
ESP_RETURN_ON_FALSE(clk_info->mclk_div, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large"); ESP_RETURN_ON_FALSE(clk_info->sclk / (float)clk_info->mclk > 1.99, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large");
/* Set down-sampling configuration */ /* Set down-sampling configuration */
i2s_ll_rx_set_pdm_dsr(handle->controller->hal.dev, pdm_rx_clk->dn_sample_mode); i2s_ll_rx_set_pdm_dsr(handle->controller->hal.dev, pdm_rx_clk->dn_sample_mode);
return ESP_OK; return ESP_OK;

6
components/driver/i2s/i2s_std.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -48,8 +48,8 @@ static esp_err_t i2s_std_calculate_clock(i2s_chan_handle_t handle, const i2s_std
clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk); clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk);
clk_info->mclk_div = clk_info->sclk / clk_info->mclk; clk_info->mclk_div = clk_info->sclk / clk_info->mclk;
/* Check if the configuration is correct */ /* Check if the configuration is correct. Use float for check in case the mclk division might be carried up in the fine division calculation */
ESP_RETURN_ON_FALSE(clk_info->mclk_div, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large"); ESP_RETURN_ON_FALSE(clk_info->sclk / (float)clk_info->mclk > 1.99, ESP_ERR_INVALID_ARG, TAG, "sample rate or mclk_multiple is too large for the current clock source");
return ESP_OK; return ESP_OK;
} }

14
components/driver/i2s/i2s_tdm.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -59,8 +59,8 @@ static esp_err_t i2s_tdm_calculate_clock(i2s_chan_handle_t handle, const i2s_tdm
clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk); clk_info->sclk = i2s_get_source_clk_freq(clk_cfg->clk_src, clk_info->mclk);
clk_info->mclk_div = clk_info->sclk / clk_info->mclk; clk_info->mclk_div = clk_info->sclk / clk_info->mclk;
/* Check if the configuration is correct */ /* Check if the configuration is correct. Use float for check in case the mclk division might be carried up in the fine division calculation */
ESP_RETURN_ON_FALSE(clk_info->mclk_div, ESP_ERR_INVALID_ARG, TAG, "sample rate is too large"); ESP_RETURN_ON_FALSE(clk_info->sclk / (float)clk_info->mclk > 1.99, ESP_ERR_INVALID_ARG, TAG, "sample rate or mclk_multiple is too large for the current clock source");
return ESP_OK; return ESP_OK;
} }
@@ -98,8 +98,12 @@ static esp_err_t i2s_tdm_set_slot(i2s_chan_handle_t handle, const i2s_tdm_slot_c
handle->active_slot = slot_cfg->slot_mode == I2S_SLOT_MODE_MONO ? 1 : __builtin_popcount(slot_cfg->slot_mask); handle->active_slot = slot_cfg->slot_mode == I2S_SLOT_MODE_MONO ? 1 : __builtin_popcount(slot_cfg->slot_mask);
uint32_t max_slot_num = 32 - __builtin_clz(slot_cfg->slot_mask); uint32_t max_slot_num = 32 - __builtin_clz(slot_cfg->slot_mask);
handle->total_slot = slot_cfg->total_slot < max_slot_num ? max_slot_num : slot_cfg->total_slot; handle->total_slot = slot_cfg->total_slot < max_slot_num ? max_slot_num : slot_cfg->total_slot;
handle->total_slot = handle->total_slot < 2 ? 2 : handle->total_slot; // At least two slots in a frame // At least two slots in a frame if not using PCM short format
handle->total_slot = ((handle->total_slot < 2) && (slot_cfg->ws_width != 1)) ? 2 : handle->total_slot;
uint32_t slot_bits = slot_cfg->slot_bit_width == I2S_SLOT_BIT_WIDTH_AUTO ? slot_cfg->data_bit_width : slot_cfg->slot_bit_width;
ESP_RETURN_ON_FALSE(handle->total_slot * slot_bits <= I2S_LL_SLOT_FRAME_BIT_MAX, ESP_ERR_INVALID_ARG, TAG,
"total slots(%"PRIu32") * slot_bit_width(%"PRIu32") exceeds the maximum %d",
handle->total_slot, slot_bits, (int)I2S_LL_SLOT_FRAME_BIT_MAX);
uint32_t buf_size = i2s_get_buf_size(handle, slot_cfg->data_bit_width, handle->dma.frame_num); uint32_t buf_size = i2s_get_buf_size(handle, slot_cfg->data_bit_width, handle->dma.frame_num);
/* The DMA buffer need to re-allocate if the buffer size changed */ /* The DMA buffer need to re-allocate if the buffer size changed */
if (handle->dma.buf_size != buf_size) { if (handle->dma.buf_size != buf_size) {

20
components/driver/test_apps/i2s_test_apps/i2s_tdm/main/test_i2s_tdm_full_duplex.c
View File

@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Unlicense OR CC0-1.0 * SPDX-License-Identifier: Unlicense OR CC0-1.0
*/ */
@@ -29,9 +29,11 @@ static const char *TAG = "i2s_tdm_full_duplex_test";
#if CONFIG_IDF_TARGET_ESP32H2 #if CONFIG_IDF_TARGET_ESP32H2
#define TEST_I2S_DO_IO (GPIO_NUM_2) #define TEST_I2S_DO_IO (GPIO_NUM_2)
#define TEST_I2S_DI_IO (GPIO_NUM_3) // DI and DO gpio will be reversed on slave runner #define TEST_I2S_DI_IO (GPIO_NUM_3) // DI and DO gpio will be reversed on slave runner
#define TEST_I2S_SAMPLE_RATE (16000)
#else #else
#define TEST_I2S_DO_IO (GPIO_NUM_6) #define TEST_I2S_DO_IO (GPIO_NUM_6)
#define TEST_I2S_DI_IO (GPIO_NUM_7) // DI and DO gpio will be reversed on slave runner #define TEST_I2S_DI_IO (GPIO_NUM_7) // DI and DO gpio will be reversed on slave runner
#define TEST_I2S_SAMPLE_RATE (48000)
#endif // CONFIG_IDF_TARGET_ESP32H2 #endif // CONFIG_IDF_TARGET_ESP32H2
typedef struct { typedef struct {
@@ -263,12 +265,12 @@ static void test_i2s_tdm_slave(uint32_t sample_rate, i2s_data_bit_width_t bit_wi
static void test_i2s_tdm_master_48k_32bits_4slots(void) static void test_i2s_tdm_master_48k_32bits_4slots(void)
{ {
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_master(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
static void test_i2s_tdm_slave_48k_32bits_4slots(void) static void test_i2s_tdm_slave_48k_32bits_4slots(void)
{ {
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_slave(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_32BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_32bits_4slots", "[I2S_TDM]", TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_32bits_4slots", "[I2S_TDM]",
@@ -277,12 +279,12 @@ TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_32bits_4slots", "[I2
static void test_i2s_tdm_master_48k_16bits_4slots(void) static void test_i2s_tdm_master_48k_16bits_4slots(void)
{ {
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_master(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
static void test_i2s_tdm_slave_48k_16bits_4slots(void) static void test_i2s_tdm_slave_48k_16bits_4slots(void)
{ {
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_slave(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_16bits_4slots", "[I2S_TDM]", TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_16bits_4slots", "[I2S_TDM]",
@@ -291,12 +293,12 @@ TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_16bits_4slots", "[I2
static void test_i2s_tdm_master_48k_8bits_4slots(void) static void test_i2s_tdm_master_48k_8bits_4slots(void)
{ {
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_master(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
static void test_i2s_tdm_slave_48k_8bits_4slots(void) static void test_i2s_tdm_slave_48k_8bits_4slots(void)
{ {
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3); test_i2s_tdm_slave(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_8BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3);
} }
TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_8bits_4slots", "[I2S_TDM]", TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_8bits_4slots", "[I2S_TDM]",
@@ -307,13 +309,13 @@ TEST_CASE_MULTIPLE_DEVICES("I2S_TDM_full_duplex_test_in_48k_8bits_4slots", "[I2S
#if !CONFIG_IDF_TARGET_ESP32H2 #if !CONFIG_IDF_TARGET_ESP32H2
static void test_i2s_tdm_master_48k_16bits_8slots(void) static void test_i2s_tdm_master_48k_16bits_8slots(void)
{ {
test_i2s_tdm_master(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 | test_i2s_tdm_master(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 |
I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7); I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7);
} }
static void test_i2s_tdm_slave_48k_16bits_8slots(void) static void test_i2s_tdm_slave_48k_16bits_8slots(void)
{ {
test_i2s_tdm_slave(48000, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 | test_i2s_tdm_slave(TEST_I2S_SAMPLE_RATE, I2S_DATA_BIT_WIDTH_16BIT, I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 | I2S_TDM_SLOT3 |
I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7); I2S_TDM_SLOT4 | I2S_TDM_SLOT5 | I2S_TDM_SLOT6 | I2S_TDM_SLOT7);
} }

1
components/hal/esp32c3/include/hal/i2s_ll.h
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@@ -31,6 +31,7 @@ extern "C" {
#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9) #define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9)
#define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1) #define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
#define I2S_LL_SLOT_FRAME_BIT_MAX 128 // Up-to 128 bits in one frame, determined by MAX(half_sample_bits) * 2
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
#define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT #define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT

1
components/hal/esp32c6/include/hal/i2s_ll.h
View File

@@ -32,6 +32,7 @@ extern "C" {
#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9) #define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9)
#define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1) #define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
#define I2S_LL_SLOT_FRAME_BIT_MAX 128 // Up-to 128 bits in one frame, determined by MAX(half_sample_bits) * 2
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
#define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT #define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT

1
components/hal/esp32h2/include/hal/i2s_ll.h
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@@ -32,6 +32,7 @@ extern "C" {
#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9) #define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9)
#define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1) #define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
#define I2S_LL_SLOT_FRAME_BIT_MAX 512 // Up-to 512 bits in one frame, determined by MAX(half_sample_bits) * 2
#define I2S_LL_PLL_F96M_CLK_FREQ (96 * 1000000) // PLL_F96M_CLK: 96MHz #define I2S_LL_PLL_F96M_CLK_FREQ (96 * 1000000) // PLL_F96M_CLK: 96MHz
#define I2S_LL_PLL_F64M_CLK_FREQ (64 * 1000000) // PLL_F64M_CLK: 64MHz #define I2S_LL_PLL_F64M_CLK_FREQ (64 * 1000000) // PLL_F64M_CLK: 64MHz

1
components/hal/esp32s3/include/hal/i2s_ll.h
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@@ -32,6 +32,7 @@ extern "C" {
#define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9) #define I2S_LL_MCLK_DIVIDER_BIT_WIDTH (9)
#define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1) #define I2S_LL_MCLK_DIVIDER_MAX ((1 << I2S_LL_MCLK_DIVIDER_BIT_WIDTH) - 1)
#define I2S_LL_SLOT_FRAME_BIT_MAX 128 // Up-to 128 bits in one frame, determined by MAX(half_sample_bits) * 2
#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
#define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT #define I2S_LL_DEFAULT_PLL_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT

10
components/hal/i2s_hal.c
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@@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@@ -282,8 +282,8 @@ void i2s_hal_tdm_set_tx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha
uint32_t msk = slot_cfg->tdm.slot_mask; uint32_t msk = slot_cfg->tdm.slot_mask;
/* Get the maximum slot number */ /* Get the maximum slot number */
cnt = 32 - __builtin_clz(msk); cnt = 32 - __builtin_clz(msk);
/* There should be at least 2 slots in total even for mono mode */ /* Except PCM short format (ws_width = 1), there should be at least 2 slots in total even for mono mode */
cnt = cnt < 2 ? 2 : cnt; cnt = ((cnt < 2) && (slot_cfg->tdm.ws_width != 1)) ? 2 : cnt;
uint32_t total_slot = slot_cfg->tdm.total_slot > cnt ? slot_cfg->tdm.total_slot : cnt; uint32_t total_slot = slot_cfg->tdm.total_slot > cnt ? slot_cfg->tdm.total_slot : cnt;
i2s_ll_tx_reset(hal->dev); i2s_ll_tx_reset(hal->dev);
i2s_ll_tx_set_slave_mod(hal->dev, is_slave); //TX Slave i2s_ll_tx_set_slave_mod(hal->dev, is_slave); //TX Slave
@@ -316,8 +316,8 @@ void i2s_hal_tdm_set_rx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha
uint32_t msk = slot_cfg->tdm.slot_mask; uint32_t msk = slot_cfg->tdm.slot_mask;
/* Get the maximum slot number */ /* Get the maximum slot number */
cnt = 32 - __builtin_clz(msk); cnt = 32 - __builtin_clz(msk);
/* There should be at least 2 slots in total even for mono mode */ /* Except PCM short format (ws_width = 1), there should be at least 2 slots in total even for mono mode */
cnt = cnt < 2 ? 2 : cnt; cnt = ((cnt < 2) && (slot_cfg->tdm.ws_width != 1)) ? 2 : cnt;
uint32_t total_slot = slot_cfg->tdm.total_slot > cnt ? slot_cfg->tdm.total_slot : cnt; uint32_t total_slot = slot_cfg->tdm.total_slot > cnt ? slot_cfg->tdm.total_slot : cnt;
i2s_ll_rx_reset(hal->dev); i2s_ll_rx_reset(hal->dev);
i2s_ll_rx_set_slave_mod(hal->dev, is_slave); //RX Slave i2s_ll_rx_set_slave_mod(hal->dev, is_slave); //RX Slave

1
examples/peripherals/i2s/i2s_basic/i2s_pdm/main/CMakeLists.txt
View File

@@ -9,4 +9,5 @@ if(CONFIG_SOC_I2S_SUPPORTS_PDM_RX)
endif() endif()
idf_component_register(SRCS "${srcs}" idf_component_register(SRCS "${srcs}"
PRIV_REQUIRES driver i2s_examples_common
INCLUDE_DIRS ".") INCLUDE_DIRS ".")

3
examples/peripherals/i2s/i2s_basic/i2s_pdm/main/idf_component.yml Normal file
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@@ -0,0 +1,3 @@
dependencies:
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common

1
examples/peripherals/i2s/i2s_basic/i2s_std/main/CMakeLists.txt
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@@ -1,2 +1,3 @@
idf_component_register(SRCS "i2s_std_example_main.c" idf_component_register(SRCS "i2s_std_example_main.c"
PRIV_REQUIRES driver i2s_examples_common
INCLUDE_DIRS ".") INCLUDE_DIRS ".")

3
examples/peripherals/i2s/i2s_basic/i2s_std/main/idf_component.yml Normal file
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@@ -0,0 +1,3 @@
dependencies:
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common

1
examples/peripherals/i2s/i2s_basic/i2s_tdm/main/CMakeLists.txt
View File

@@ -1,2 +1,3 @@
idf_component_register(SRCS "i2s_tdm_example_main.c" idf_component_register(SRCS "i2s_tdm_example_main.c"
PRIV_REQUIRES driver i2s_examples_common
INCLUDE_DIRS ".") INCLUDE_DIRS ".")

3
examples/peripherals/i2s/i2s_basic/i2s_tdm/main/idf_component.yml Normal file
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@@ -0,0 +1,3 @@
dependencies:
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common

2
examples/peripherals/i2s/i2s_codec/i2s_es7210_tdm/main/CMakeLists.txt
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@@ -1,3 +1,3 @@
idf_component_register(SRCS "i2s_es7210_record_example.c" idf_component_register(SRCS "i2s_es7210_record_example.c"
INCLUDE_DIRS "$ENV{IDF_PATH}/examples/peripherals/i2s/common" PRIV_REQUIRES driver fatfs i2s_examples_common
) )

2
examples/peripherals/i2s/i2s_codec/i2s_es7210_tdm/main/idf_component.yml
View File

@@ -15,3 +15,5 @@ dependencies:
# # `public` flag doesn't have an effect dependencies of the `main` component. # # `public` flag doesn't have an effect dependencies of the `main` component.
# # All dependencies of `main` are public by default. # # All dependencies of `main` are public by default.
# public: true # public: true
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common

2
examples/peripherals/i2s/i2s_codec/i2s_es8311/main/idf_component.yml
View File

@@ -16,3 +16,5 @@ dependencies:
# version: "^1" # version: "^1"
# rules: # rules:
# - if: "target in [esp32s3]" # - if: "target in [esp32s3]"
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common

2
examples/peripherals/i2s/i2s_examples_common/CMakeLists.txt Normal file
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@@ -0,0 +1,2 @@
# register I2S common dependencies as a component
idf_component_register(INCLUDE_DIRS ".")

0
examples/peripherals/i2s/common/format_wav.h → examples/peripherals/i2s/i2s_examples_common/format_wav.h
View File

2
examples/peripherals/i2s/i2s_recorder/main/CMakeLists.txt
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@@ -1,2 +1,2 @@
idf_component_register(SRCS "i2s_recorder_main.c" idf_component_register(SRCS "i2s_recorder_main.c"
INCLUDE_DIRS "$ENV{IDF_PATH}/examples/peripherals/i2s/common") PRIV_REQUIRES driver fatfs i2s_examples_common)

3
examples/peripherals/i2s/i2s_recorder/main/idf_component.yml Normal file
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@@ -0,0 +1,3 @@
dependencies:
i2s_examples_common:
path: ${IDF_PATH}/examples/peripherals/i2s/i2s_examples_common