diff --git a/components/esp_psram/test_apps/psram/sdkconfig.ci.esp32s3_octal_advanced b/components/esp_psram/test_apps/psram/sdkconfig.ci.esp32s3_octal_advanced
index 20f4386487..4634cbb061 100644
--- a/components/esp_psram/test_apps/psram/sdkconfig.ci.esp32s3_octal_advanced
+++ b/components/esp_psram/test_apps/psram/sdkconfig.ci.esp32s3_octal_advanced
@@ -2,6 +2,7 @@ CONFIG_IDF_TARGET="esp32s3"
 
 CONFIG_ESP32S3_SPIRAM_SUPPORT=y
 CONFIG_SPIRAM_MODE_OCT=y
+CONFIG_SPIRAM_SPEED_80M=y
 CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
 CONFIG_SPIRAM_RODATA=y
 
diff --git a/components/spi_flash/spi_flash_timing_tuning.c b/components/spi_flash/spi_flash_timing_tuning.c
index 277024c969..ec0fd0e0aa 100644
--- a/components/spi_flash/spi_flash_timing_tuning.c
+++ b/components/spi_flash/spi_flash_timing_tuning.c
@@ -392,6 +392,9 @@ static void clear_timing_tuning_regs(bool control_spi1)
     } else {
         //Won't touch SPI1 registers
     }
+
+    spi_timing_config_psram_set_din_mode_num(0, 0, 0);
+    spi_timing_config_psram_set_extra_dummy(0, 0);
 }
 #endif  //#if SPI_TIMING_FLASH_NEEDS_TUNING || SPI_TIMING_PSRAM_NEEDS_TUNING
 
@@ -414,6 +417,9 @@ void spi_timing_enter_mspi_low_speed_mode(bool control_spi1)
         spi_timing_config_set_flash_clock(1, 4);
     }
 
+    //Set PSRAM module clock
+    spi_timing_config_set_psram_clock(0, 4);
+
 #if SPI_TIMING_FLASH_NEEDS_TUNING || SPI_TIMING_PSRAM_NEEDS_TUNING
     clear_timing_tuning_regs(control_spi1);
 #endif