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change(esp_hw_support): force top domain power up during sleep
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@@ -2441,6 +2441,11 @@ FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) {
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#if SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
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#if SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN
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top_pd_allowed &= (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON);
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top_pd_allowed &= (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON);
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#endif
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#endif
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#if SOC_PM_TOP_PD_NOT_ALLOWED
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// TODO: PM-436, Need to use efuse_hal_chip_revision() to determine whether
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// the TOP domain power-down is allowed
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top_pd_allowed = false;
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#endif
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return top_pd_allowed;
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return top_pd_allowed;
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}
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}
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@@ -1615,6 +1615,10 @@ config SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN
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bool
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bool
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default y
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default y
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config SOC_PM_TOP_PD_NOT_ALLOWED
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bool
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default y
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config SOC_PM_PAU_LINK_NUM
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config SOC_PM_PAU_LINK_NUM
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int
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int
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default 5
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default 5
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@@ -636,6 +636,7 @@
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#define SOC_PM_CPU_RETENTION_BY_SW (1)
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#define SOC_PM_CPU_RETENTION_BY_SW (1)
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
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#define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
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#define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
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#define SOC_PM_TOP_PD_NOT_ALLOWED (1)
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#define SOC_PM_PAU_LINK_NUM (5)
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#define SOC_PM_PAU_LINK_NUM (5)
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#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
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#define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1)
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