ci: Enable esp32c6 example, test_apps, and unit tests CI build stage

This commit is contained in:
Song Ruo Jing
2022-10-27 18:55:07 +08:00
parent 0b47e173e6
commit 2557e24a28
157 changed files with 822 additions and 293 deletions

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@@ -20,6 +20,12 @@ components/driver/test_apps/i2s_test_apps/legacy_i2s_adc_dac:
disable:
- if: SOC_I2S_SUPPORTS_ADC_DAC != 1
components/driver/test_apps/legacy_adc_driver:
disable:
- if: IDF_TARGET == "esp32c6"
temporary: true
reason: target esp32c6 is not supported yet
components/driver/test_apps/legacy_mcpwm_driver:
disable:
- if: SOC_MCPWM_SUPPORTED != 1
@@ -27,6 +33,9 @@ components/driver/test_apps/legacy_mcpwm_driver:
components/driver/test_apps/legacy_pcnt_driver:
disable:
- if: SOC_PCNT_SUPPORTED != 1
- if: IDF_TARGET == "esp32c6"
temporary: true
reason: test depends on ledc to be supported on esp32c6
components/driver/test_apps/legacy_rmt_driver:
disable:

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@@ -11,6 +11,7 @@
#include "esp_rom_gpio.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
int test_freq_default[]=TEST_FREQ_DEFAULT();
const char MASTER_TAG[] = "test_master";
@@ -249,3 +250,4 @@ void get_tx_buffer(uint32_t seed, uint8_t *master_send_buf, uint8_t *slave_send_
master_send_buf[i] = rand() % 256;
}
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)

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@@ -25,6 +25,7 @@
#include "hal/gpio_hal.h"
#include "hal/uart_ll.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
#if SOC_I2C_SUPPORT_SLAVE // i2c test can't work without slave
#define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
@@ -730,3 +731,4 @@ TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
}
#endif // SOC_I2C_SUPPORT_SLAVE
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)

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@@ -24,6 +24,7 @@
#include "soc/io_mux_reg.h"
#include "esp_system.h"
#include "esp_timer.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
#include "driver/ledc.h"
#include "hal/ledc_ll.h"
#include "driver/gpio.h"
@@ -644,3 +645,4 @@ TEST_CASE_MULTIPLE_STAGES("LEDC continue work after software reset", "[ledc]",
ledc_cpu_reset_test_second_stage);
#endif // SOC_PCNT_SUPPORTED
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)

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@@ -44,6 +44,7 @@ typedef struct {
} task_context_t;
#if !(CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
const static char TAG[] = "test_spi";
@@ -296,7 +297,7 @@ TEST_CASE("spi bus lock","[spi]")
test_bus_lock(false);
}
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2, ESP32H2)
#if !DISABLED_FOR_TARGETS(ESP32S2, ESP32C3, ESP32S3, ESP32C2, ESP32H2, ESP32C6)
//disable, SPI1 is not available for GPSPI usage on chips later than ESP32
static IRAM_ATTR esp_err_t test_polling_send(spi_device_handle_t handle)
{
@@ -348,4 +349,5 @@ TEST_CASE("spi master can be used on SPI1", "[spi]")
//TODO: add a case when a non-polling transaction happened in the bus-acquiring time and then release the bus then queue a new trans
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
#endif //!(CONFIG_SPIRAM && CONFIG_IDF_TARGET_ESP32)

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@@ -32,10 +32,11 @@
#include "test/test_common_spi.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
const static char TAG[] = "test_spi";
// There is no input-only pin on esp32c3 and esp32s3
#define TEST_SOC_HAS_INPUT_ONLY_PINS (!DISABLED_FOR_TARGETS(ESP32C3, ESP32S3, ESP32C2))
// There is no input-only pin except on esp32 and esp32s2
#define TEST_SOC_HAS_INPUT_ONLY_PINS (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2)
static void check_spi_pre_n_for(int clk, int pre, int n)
{
@@ -355,7 +356,7 @@ TEST_CASE("spi placed on input-only pins", "[spi]")
TEST_ESP_OK(test_slave_pins(PIN_NUM_MOSI, PIN_NUM_MISO, PIN_NUM_CLK, INPUT_ONLY_PIN));
}
//There is no input-only pin on esp32c3 and esp32s3, so this test could be ignored.
//There is no input-only pin except on esp32 and esp32s2, so this test could be ignored.
#endif //#if TEST_SOC_HAS_INPUT_ONLY_PINS
TEST_CASE("spi bus setting with different pin configs", "[spi]")
@@ -1573,3 +1574,4 @@ void test_add_device_slave(void)
}
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test multiple devices", "[spi_ms][test_env=Example_SPI_Multi_device]", test_add_device_master, test_add_device_slave);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)

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@@ -143,6 +143,7 @@ TEST_CASE("SPI Single Board Test SIO", "[spi]")
#endif //#if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
/********************************************************************************
* Test SIO Master
* SIO Slave is not suported, and one unit test is limited to one feature, so,,,
@@ -334,3 +335,4 @@ void test_slave_run(void)
}
TEST_CASE_MULTIPLE_DEVICES("SPI_Master:Test_SIO_Mode_Multi_Board", "[spi_ms][test_env=Example_SPI_Multi_device]", test_master_run, test_slave_run);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)

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@@ -261,7 +261,7 @@ TEST_CASE("test slave send unaligned","[spi]")
#endif // #if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2, ESP32C6)
#if (TEST_SPI_PERIPH_NUM == 1)
//These tests are for chips which only have 1 SPI controller
/********************************************************************************

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@@ -594,6 +594,7 @@ TEST_CASE("test spi slave hd segment mode, master too long", "[spi][spi_slv_hd]"
#endif //#if (TEST_SPI_PERIPH_NUM >= 2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
#if (TEST_SPI_PERIPH_NUM == 1)
//These tests are for chips which only have 1 SPI controller
/********************************************************************************
@@ -883,4 +884,6 @@ TEST_CASE_MULTIPLE_DEVICES("SPI quad hd test ", "[spi_ms][test_env=Example_SPI_Q
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C6)
#endif //SOC_SPI_SUPPORT_SLAVE_HD_VER2

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

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@@ -1,3 +1,3 @@
| Supported Targets | ESP32-C3 | ESP32-S3 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-C3 | ESP32-C6 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-S3 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 | ESP32-C6 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-S3 |
| ----------------- | ----- | -------- |
| Supported Targets | ESP32 | ESP32-C6 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- |

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@@ -40,7 +40,7 @@ TEST_CASE("mcpwm_capture_iram_safe", "[mcpwm]")
printf("install mcpwm capture timer\r\n");
mcpwm_cap_timer_handle_t cap_timer = NULL;
mcpwm_capture_timer_config_t cap_timer_config = {
.clk_src = MCPWM_CAPTURE_CLK_SRC_APB,
.clk_src = MCPWM_CAPTURE_CLK_SRC_DEFAULT,
.group_id = 0,
};
TEST_ESP_OK(mcpwm_new_capture_timer(&cap_timer_config, &cap_timer));

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |

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@@ -8,6 +8,7 @@ from pytest_embedded import Dut
@pytest.mark.esp32
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32c6
@pytest.mark.generic
@pytest.mark.parametrize(
'config',

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |

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@@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C3 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- |