From 463c49c7fe49cb7ed3e8c51a0c77230e401f3747 Mon Sep 17 00:00:00 2001 From: "wangtao@espressif.com" Date: Thu, 5 Jun 2025 11:40:04 +0800 Subject: [PATCH 1/6] fix(wifi): add check for esp_wifi_set_config --- components/esp_wifi/include/esp_wifi.h | 1 + 1 file changed, 1 insertion(+) diff --git a/components/esp_wifi/include/esp_wifi.h b/components/esp_wifi/include/esp_wifi.h index d37ae14de2..df43eec32e 100644 --- a/components/esp_wifi/include/esp_wifi.h +++ b/components/esp_wifi/include/esp_wifi.h @@ -913,6 +913,7 @@ esp_err_t esp_wifi_get_promiscuous_ctrl_filter(wifi_promiscuous_filter_t *filter * - ESP_ERR_WIFI_MODE: invalid mode * - ESP_ERR_WIFI_PASSWORD: invalid password * - ESP_ERR_WIFI_NVS: WiFi internal NVS error + * - ESP_ERR_WIFI_STATE: WiFi still connecting when invoke esp_wifi_set_config * - others: refer to the error code in esp_err.h */ esp_err_t esp_wifi_set_config(wifi_interface_t interface, wifi_config_t *conf); From f3ad8c304d1dff2e3e5c608c296a32b0af78383e Mon Sep 17 00:00:00 2001 From: liuning Date: Thu, 20 Mar 2025 17:48:32 +0800 Subject: [PATCH 2/6] feat(docs): update connectionless module window syncronization documentation --- docs/en/api-guides/wifi.rst | 6 +++++- docs/zh_CN/api-guides/wifi.rst | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/docs/en/api-guides/wifi.rst b/docs/en/api-guides/wifi.rst index e9d852e85a..9913d5dc92 100644 --- a/docs/en/api-guides/wifi.rst +++ b/docs/en/api-guides/wifi.rst @@ -1824,7 +1824,11 @@ At the start of `Interval` time, RF, PHY, BB would be turned on and kept for `Wi - Event `WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START`_ would be posted at the start of `Interval`. Since `Window` also starts at that moment, its recommended to TX in that event. - - At connected state, the start of `Interval` would be aligned with TBTT. + - At connected state, the start of `Interval` would be aligned with TBTT. To improve the packet reception success rate in connectionless modules, the sender and receiver can be connected to the same AP, and packets can be transmitted within the event `WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START`_. This synchronization helps align the connectionless modules transmission window. + + .. only:: esp32 + + On the ESP32, TBTT timing is affected by DFS(Dynamic Frequency Scaling). To synchronize the connectionless modules transmission window using TBTT on the ESP32, DFS must be disabled. **Window** diff --git a/docs/zh_CN/api-guides/wifi.rst b/docs/zh_CN/api-guides/wifi.rst index 19e119de2a..ffe4d64b87 100644 --- a/docs/zh_CN/api-guides/wifi.rst +++ b/docs/zh_CN/api-guides/wifi.rst @@ -1797,7 +1797,11 @@ AP 睡眠 - 在 `Interval` 开始时，将会给出 `WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START`_ 事件，由于 `Window` 将在此时开始，可以在此事件内布置发包动作。 - - 在连接状态下，`Interval` 开始的时间点将会与 TBTT 时间点对齐。 + - 在连接状态下，`Interval` 开始的时间点将会与 TBTT 时间点对齐。可以通过将非连接模块的接收端和发送端连接在同一路由器下，并在 `WIFI_EVENT_CONNECTIONLESS_MODULE_WAKE_INTERVAL_START`_ 事件内进行发包，以同步非连接模块的传输窗口，达到提高接收端收包成功率的效果。 + + .. only:: esp32 + + 在 ESP32 上，TBTT 时间点会受到 DFS(Dynamic Frequency Scaling) 的干扰，如果想要在 ESP32 上通过 TBTT 同步非连接模块的传输窗口，需要禁用 DFS。 **Window** From 0a60a4b167b05aa929816fb8151ac0cacad199b6 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Mon, 24 Feb 2025 19:38:19 +0800 Subject: [PATCH 3/6] fix(wifi):fix modem state rx bcn failed when tbtt update, support modem state for coexist --- .../esp_coex/include/private/esp_coexist_internal.h | 9 +++++++++ components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 2 +- components/esp_rom/esp32c3/ld/esp32c3.rom.ld | 2 +- components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld | 2 +- components/esp_rom/esp32s3/ld/esp32s3.rom.ld | 2 +- components/esp_wifi/esp32/esp_adapter.c | 10 ++++++++++ components/esp_wifi/esp32c2/esp_adapter.c | 10 ++++++++++ components/esp_wifi/esp32c3/esp_adapter.c | 10 ++++++++++ components/esp_wifi/esp32c6/esp_adapter.c | 10 ++++++++++ components/esp_wifi/esp32s2/esp_adapter.c | 10 ++++++++++ components/esp_wifi/esp32s3/esp_adapter.c | 10 ++++++++++ .../esp_wifi/include/esp_private/wifi_os_adapter.h | 1 + 12 files changed, 74 insertions(+), 4 deletions(-) diff --git a/components/esp_coex/include/private/esp_coexist_internal.h b/components/esp_coex/include/private/esp_coexist_internal.h index 5eac40b708..6e3799487f 100644 --- a/components/esp_coex/include/private/esp_coexist_internal.h +++ b/components/esp_coex/include/private/esp_coexist_internal.h @@ -396,6 +396,15 @@ int coex_schm_flexible_period_set(uint8_t period); uint8_t coex_schm_flexible_period_get(void); #endif +/** + * @brief Get coexistence scheme phase by phase index. + * + * @param phase_idx Coexistence phase index + * + * @return Coexistence scheme phase + */ +void * coex_schm_get_phase_by_idx(int phase_idx); + /** * @brief Check the MD5 values of the coexistence adapter header files in IDF and WiFi library * diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index 60fe2a4657..6c0d7fbbff 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -604,7 +604,7 @@ pm_enable_active_timer = 0x40001b84; pm_enable_sleep_delay_timer = 0x40001b88; pm_local_tsf_process = 0x40001b8c; pm_set_beacon_filter = 0x40001b90; -pm_is_in_wifi_slice_threshold = 0x40001b94; +/*pm_is_in_wifi_slice_threshold = 0x40001b94;*/ pm_is_waked = 0x40001b98; /*pm_keep_alive = 0x40001b9c;*/ /* pm_on_beacon_rx = 0x40001ba0; */ diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index 81f88aef76..f99b43a4c8 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -718,7 +718,7 @@ pm_enable_active_timer = 0x40001660; pm_enable_sleep_delay_timer = 0x40001664; pm_local_tsf_process = 0x40001668; pm_set_beacon_filter = 0x4000166c; -pm_is_in_wifi_slice_threshold = 0x40001670; +/*pm_is_in_wifi_slice_threshold = 0x40001670;*/ pm_is_waked = 0x40001674; /*pm_keep_alive = 0x40001678;*/ /* pm_on_beacon_rx = 0x4000167c; */ diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld index 9177c2a5ea..83eae73b2d 100644 --- a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld @@ -66,7 +66,7 @@ pm_mac_sleep = 0x40000c84; pm_enable_sleep_delay_timer = 0x40000c8c; pm_local_tsf_process = 0x40000c90; //pm_set_beacon_filter = 0x40000c94; -pm_is_in_wifi_slice_threshold = 0x40000c98; +/*pm_is_in_wifi_slice_threshold = 0x40000c98;*/ pm_is_waked = 0x40000c9c; //pm_keep_alive = 0x40000ca0; /* pm_on_beacon_rx = 0x40000ca4; */ diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index bc41ff5396..d30639e516 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -995,7 +995,7 @@ pm_enable_active_timer = 0x40005460; pm_enable_sleep_delay_timer = 0x4000546c; pm_local_tsf_process = 0x40005478; pm_set_beacon_filter = 0x40005484; -pm_is_in_wifi_slice_threshold = 0x40005490; +/*pm_is_in_wifi_slice_threshold = 0x40005490;*/ pm_is_waked = 0x4000549c; /*pm_keep_alive = 0x400054a8;*/ /* pm_on_beacon_rx = 0x400054b4; */ diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c index 5fc7e6a786..31594b17d5 100644 --- a/components/esp_wifi/esp32/esp_adapter.c +++ b/components/esp_wifi/esp32/esp_adapter.c @@ -589,6 +589,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -725,5 +734,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c2/esp_adapter.c b/components/esp_wifi/esp32c2/esp_adapter.c index aee701c2a9..86cacc3aca 100644 --- a/components/esp_wifi/esp32c2/esp_adapter.c +++ b/components/esp_wifi/esp32c2/esp_adapter.c @@ -530,6 +530,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -665,5 +674,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c3/esp_adapter.c b/components/esp_wifi/esp32c3/esp_adapter.c index b4d8bbeb52..ff825fe26c 100644 --- a/components/esp_wifi/esp32c3/esp_adapter.c +++ b/components/esp_wifi/esp32c3/esp_adapter.c @@ -547,6 +547,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -682,5 +691,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c6/esp_adapter.c b/components/esp_wifi/esp32c6/esp_adapter.c index 0547b776d2..a255652390 100644 --- a/components/esp_wifi/esp32c6/esp_adapter.c +++ b/components/esp_wifi/esp32c6/esp_adapter.c @@ -536,6 +536,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -687,5 +696,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32s2/esp_adapter.c b/components/esp_wifi/esp32s2/esp_adapter.c index 56110d6258..5c752267ae 100644 --- a/components/esp_wifi/esp32s2/esp_adapter.c +++ b/components/esp_wifi/esp32s2/esp_adapter.c @@ -584,6 +584,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -719,5 +728,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32s3/esp_adapter.c b/components/esp_wifi/esp32s3/esp_adapter.c index dc99f4858b..7251b674f7 100644 --- a/components/esp_wifi/esp32s3/esp_adapter.c +++ b/components/esp_wifi/esp32s3/esp_adapter.c @@ -601,6 +601,15 @@ static uint8_t coex_schm_flexible_period_get_wrapper(void) #endif } +static void * coex_schm_get_phase_by_idx_wrapper(int phase_idx) +{ +#if CONFIG_SW_COEXIST_ENABLE + return coex_schm_get_phase_by_idx(phase_idx); +#else + return NULL; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -737,5 +746,6 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_schm_register_cb = coex_schm_register_cb_wrapper, ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, + ._coex_schm_get_phase_by_idx = coex_schm_get_phase_by_idx_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/include/esp_private/wifi_os_adapter.h b/components/esp_wifi/include/esp_private/wifi_os_adapter.h index 0016eb2ba0..1bc56c72e2 100644 --- a/components/esp_wifi/include/esp_private/wifi_os_adapter.h +++ b/components/esp_wifi/include/esp_private/wifi_os_adapter.h @@ -155,6 +155,7 @@ typedef struct { #endif int (*_coex_schm_flexible_period_set)(uint8_t); uint8_t (*_coex_schm_flexible_period_get)(void); + void * (*_coex_schm_get_phase_by_idx)(int); int32_t _magic; } wifi_osi_funcs_t; From fe939208c3f2ad5ea8521ac29744a92d2a3d0a0d Mon Sep 17 00:00:00 2001 From: Li Shuai Date: Tue, 1 Apr 2025 19:16:17 +0800 Subject: [PATCH 4/6] change(esp_hw_support): add interface to calculate slow clock period by clock frequency --- components/esp_hw_support/port/esp32/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32c2/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32c3/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32c6/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32h2/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32p4/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32s2/rtc_time.c | 2 ++ components/esp_hw_support/port/esp32s3/rtc_time.c | 2 ++ components/soc/esp32/include/soc/rtc.h | 8 ++++++++ components/soc/esp32c2/include/soc/rtc.h | 8 ++++++++ components/soc/esp32c3/include/soc/rtc.h | 8 ++++++++ components/soc/esp32c6/include/soc/rtc.h | 8 ++++++++ components/soc/esp32h2/include/soc/rtc.h | 8 ++++++++ components/soc/esp32p4/include/soc/rtc.h | 8 ++++++++ components/soc/esp32s2/include/soc/rtc.h | 8 ++++++++ components/soc/esp32s3/include/soc/rtc.h | 8 ++++++++ 16 files changed, 80 insertions(+) diff --git a/components/esp_hw_support/port/esp32/rtc_time.c b/components/esp_hw_support/port/esp32/rtc_time.c index 528aa549ad..5b5c4598c3 100644 --- a/components/esp_hw_support/port/esp32/rtc_time.c +++ b/components/esp_hw_support/port/esp32/rtc_time.c @@ -191,6 +191,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c2/rtc_time.c b/components/esp_hw_support/port/esp32c2/rtc_time.c index acae81a813..8c8ac2016b 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_time.c +++ b/components/esp_hw_support/port/esp32c2/rtc_time.c @@ -191,6 +191,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c3/rtc_time.c b/components/esp_hw_support/port/esp32c3/rtc_time.c index d31209b0c9..17cacbbb70 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_time.c +++ b/components/esp_hw_support/port/esp32c3/rtc_time.c @@ -194,6 +194,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32c6/rtc_time.c b/components/esp_hw_support/port/esp32c6/rtc_time.c index b215e0f948..d5ad37cc7b 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_time.c +++ b/components/esp_hw_support/port/esp32c6/rtc_time.c @@ -267,6 +267,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32h2/rtc_time.c b/components/esp_hw_support/port/esp32h2/rtc_time.c index 306fe4e307..2bf4e6ed9b 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_time.c +++ b/components/esp_hw_support/port/esp32h2/rtc_time.c @@ -269,6 +269,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32p4/rtc_time.c b/components/esp_hw_support/port/esp32p4/rtc_time.c index 3eb3253cd7..483ecc54d6 100644 --- a/components/esp_hw_support/port/esp32p4/rtc_time.c +++ b/components/esp_hw_support/port/esp32p4/rtc_time.c @@ -230,6 +230,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32s2/rtc_time.c b/components/esp_hw_support/port/esp32s2/rtc_time.c index 3818a2624a..4df6a05180 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_time.c +++ b/components/esp_hw_support/port/esp32s2/rtc_time.c @@ -259,6 +259,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/esp_hw_support/port/esp32s3/rtc_time.c b/components/esp_hw_support/port/esp32s3/rtc_time.c index c161e57d1e..32bb0796fc 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_time.c +++ b/components/esp_hw_support/port/esp32s3/rtc_time.c @@ -193,6 +193,8 @@ uint32_t rtc_clk_freq_cal(uint32_t cal_val) return 1000000ULL * (1 << RTC_CLK_CAL_FRACT) / cal_val; } +uint32_t rtc_clk_freq_to_period(uint32_t) __attribute__((alias("rtc_clk_freq_cal"))); + /// @brief if the calibration is used, we need to enable the timer group0 first __attribute__((constructor)) static void enable_timer_group0_for_calibration(void) diff --git a/components/soc/esp32/include/soc/rtc.h b/components/soc/esp32/include/soc/rtc.h index efa692d6fe..a712d5fb1a 100644 --- a/components/soc/esp32/include/soc/rtc.h +++ b/components/soc/esp32/include/soc/rtc.h @@ -488,6 +488,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief sleep configuration for rtc_sleep_init function */ diff --git a/components/soc/esp32c2/include/soc/rtc.h b/components/soc/esp32c2/include/soc/rtc.h index d8b3c1897c..3ea2f23fbb 100644 --- a/components/soc/esp32c2/include/soc/rtc.h +++ b/components/soc/esp32c2/include/soc/rtc.h @@ -514,6 +514,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/soc/esp32c3/include/soc/rtc.h b/components/soc/esp32c3/include/soc/rtc.h index 3e91b64bbf..165f8b957e 100644 --- a/components/soc/esp32c3/include/soc/rtc.h +++ b/components/soc/esp32c3/include/soc/rtc.h @@ -541,6 +541,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/soc/esp32c6/include/soc/rtc.h b/components/soc/esp32c6/include/soc/rtc.h index 46fb2c978a..4a9a984080 100644 --- a/components/soc/esp32c6/include/soc/rtc.h +++ b/components/soc/esp32c6/include/soc/rtc.h @@ -486,6 +486,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- // **WARNING**: The following are only for backwards compatibility. diff --git a/components/soc/esp32h2/include/soc/rtc.h b/components/soc/esp32h2/include/soc/rtc.h index 3c6010db02..4a7f34885f 100644 --- a/components/soc/esp32h2/include/soc/rtc.h +++ b/components/soc/esp32h2/include/soc/rtc.h @@ -482,6 +482,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + // -------------------------- CLOCK TREE DEFS ALIAS ---------------------------- // **WARNING**: The following are only for backwards compatibility. // Please use the declarations in soc/clk_tree_defs.h instead. diff --git a/components/soc/esp32p4/include/soc/rtc.h b/components/soc/esp32p4/include/soc/rtc.h index 558b033b1d..5558cd2f43 100644 --- a/components/soc/esp32p4/include/soc/rtc.h +++ b/components/soc/esp32p4/include/soc/rtc.h @@ -567,6 +567,14 @@ typedef soc_rtc_fast_clk_src_t rtc_fast_freq_t; #define rtc_clk_fast_freq_set(fast_freq) rtc_clk_fast_src_set(fast_freq) #define rtc_clk_fast_freq_get() rtc_clk_fast_src_get() +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h index 3a333fa379..ad92d0fee9 100644 --- a/components/soc/esp32s2/include/soc/rtc.h +++ b/components/soc/esp32s2/include/soc/rtc.h @@ -574,6 +574,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power down flags for rtc_sleep_pd function */ diff --git a/components/soc/esp32s3/include/soc/rtc.h b/components/soc/esp32s3/include/soc/rtc.h index e1b34178ba..52b46071d2 100644 --- a/components/soc/esp32s3/include/soc/rtc.h +++ b/components/soc/esp32s3/include/soc/rtc.h @@ -554,6 +554,14 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); +/** + * @brief Calculate the slow clock period value by slow clock frequency + * + * @param freq_hz Frequency of the slow clock in Hz + * @return Fixed point value of slow clock period in microseconds + */ +uint32_t rtc_clk_freq_to_period(uint32_t freq_hz); + /** * @brief Power up flags for rtc_sleep_pd function */ From be797e76133ad6e38b97827f7b91a34d80faae96 Mon Sep 17 00:00:00 2001 From: Li Shuai Date: Tue, 1 Apr 2025 19:24:42 +0800 Subject: [PATCH 5/6] fix(esp_hw_support): fix modem wakeup req always high caused by pmu min slp cycle update --- .../include/esp_private/esp_pmu.h | 7 ++-- .../esp_hw_support/port/esp32c6/pmu_sleep.c | 32 +++++++++++++++---- .../esp_hw_support/port/esp32h2/pmu_sleep.c | 3 +- components/esp_hw_support/sleep_modes.c | 4 +-- .../esp32c6/include/soc/Kconfig.soc_caps.in | 4 +++ components/soc/esp32c6/include/soc/soc_caps.h | 1 + 6 files changed, 40 insertions(+), 11 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 1d8d2c309b..29ff7568f1 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -12,6 +12,7 @@ #include #include "soc/soc_caps.h" +#include "soc/clk_tree_defs.h" #ifdef __cplusplus extern "C" { @@ -204,18 +205,20 @@ bool pmu_sleep_pll_already_enabled(void); * @brief Calculate the hardware time overhead during sleep to compensate for sleep time * * @param pd_flags flags indicates the power domain that will be powered down + * @param slowclk_src slow clock source of pmu * @param slowclk_period re-calibrated slow clock period * @param fastclk_period re-calibrated fast clock period * * @return hardware time overhead in us */ -uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period); +uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period); /** * @brief Get default sleep configuration * @param config pmu_sleep_config instance * @param pd_flags flags indicates the power domain that will be powered down * @param adjustment total software and hardware time overhead + * @param slowclk_src slow clock source of pmu * @param slowclk_period re-calibrated slow clock period in microseconds, * Q13.19 fixed point format * @param fastclk_period re-calibrated fast clock period in microseconds, @@ -224,7 +227,7 @@ uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_pe * @return hardware time overhead in us */ -const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t pd_flags, uint32_t adjustment, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp); +const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t pd_flags, uint32_t adjustment, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp); /** * @brief Prepare the chip to enter sleep mode diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c index 6e6e0a32b6..c71f76e83f 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c @@ -105,7 +105,7 @@ void pmu_sleep_disable_regdma_backup(void) } } -uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period) +uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period) { const pmu_sleep_machine_constant_t *mc = (pmu_sleep_machine_constant_t *)PMU_instance()->mc; @@ -147,8 +147,20 @@ uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_pe * | wake-up delay | */ #if SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP + int min_slp_time_adjustment_us = 0; +#if SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED + if (slowclk_src == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) { + const uint32_t slowclk_period_fixed = rtc_clk_freq_to_period(SOC_CLK_RC_SLOW_FREQ_APPROX); + const int min_slp_cycle_fixed = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period_fixed); + const int min_slp_cycle_calib = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period); + const int min_slp_cycle_diff = (min_slp_cycle_calib > min_slp_cycle_fixed) ? \ + (min_slp_cycle_calib - min_slp_cycle_fixed) : (min_slp_cycle_fixed - min_slp_cycle_calib); + const int min_slp_time_diff = rtc_time_slowclk_to_us(min_slp_cycle_diff, slowclk_period_fixed); + min_slp_time_adjustment_us = (min_slp_cycle_calib > min_slp_cycle_fixed) ? min_slp_time_diff : -min_slp_time_diff; + } +#endif const int rf_on_protect_time_us = mc->hp.regdma_rf_on_work_time_us; - const int total_hw_wait_time_us = lp_hw_wait_time_us + hp_hw_wait_time_us + mc->hp.clock_domain_sync_time_us; + const int total_hw_wait_time_us = lp_hw_wait_time_us + hp_hw_wait_time_us + mc->hp.clock_domain_sync_time_us + min_slp_time_adjustment_us; #else const int rf_on_protect_time_us = 0; const int total_hw_wait_time_us = lp_hw_wait_time_us + hp_hw_wait_time_us; @@ -163,24 +175,31 @@ static inline pmu_sleep_param_config_t * pmu_sleep_param_config_default( pmu_sleep_power_config_t *power, /* We'll use the runtime power parameter to determine some hardware parameters */ const uint32_t pd_flags, const uint32_t adjustment, + soc_rtc_slow_clk_src_t slowclk_src, const uint32_t slowclk_period, const uint32_t fastclk_period ) { const pmu_sleep_machine_constant_t *mc = (pmu_sleep_machine_constant_t *)PMU_instance()->mc; - param->hp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period); +#if (SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED && SOC_PM_SUPPORT_PMU_MODEM_STATE && CONFIG_ESP_WIFI_ENHANCED_LIGHT_SLEEP) + const uint32_t slowclk_period_fixed = (slowclk_src == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) ? rtc_clk_freq_to_period(SOC_CLK_RC_SLOW_FREQ_APPROX) : slowclk_period; +#else + const uint32_t slowclk_period_fixed = slowclk_period; +#endif + + param->hp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->hp.min_slp_time_us, slowclk_period_fixed); param->hp_sys.analog_wait_target_cycle = rtc_time_us_to_fastclk(mc->hp.analog_wait_time_us, fastclk_period); param->hp_sys.digital_power_supply_wait_cycle = rtc_time_us_to_fastclk(mc->hp.power_supply_wait_time_us, fastclk_period); param->hp_sys.digital_power_up_wait_cycle = rtc_time_us_to_fastclk(mc->hp.power_up_wait_time_us, fastclk_period); param->hp_sys.pll_stable_wait_cycle = rtc_time_us_to_fastclk(mc->hp.pll_wait_stable_time_us, fastclk_period); - const int hw_wait_time_us = pmu_sleep_calculate_hw_wait_time(pd_flags, slowclk_period, fastclk_period); + const int hw_wait_time_us = pmu_sleep_calculate_hw_wait_time(pd_flags, slowclk_src, slowclk_period, fastclk_period); const int modem_state_skip_time_us = mc->hp.regdma_m2a_work_time_us + mc->hp.system_dfs_up_work_time_us + mc->lp.min_slp_time_us; const int modem_wakeup_wait_time_us = adjustment - hw_wait_time_us + modem_state_skip_time_us + mc->hp.regdma_rf_on_work_time_us; param->hp_sys.modem_wakeup_wait_cycle = rtc_time_us_to_fastclk(modem_wakeup_wait_time_us, fastclk_period); - param->lp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->lp.min_slp_time_us, slowclk_period); + param->lp_sys.min_slp_slow_clk_cycle = rtc_time_us_to_slowclk(mc->lp.min_slp_time_us, slowclk_period_fixed); param->lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(mc->lp.analog_wait_time_us, slowclk_period); param->lp_sys.digital_power_supply_wait_cycle = rtc_time_us_to_fastclk(mc->lp.power_supply_wait_time_us, fastclk_period); param->lp_sys.digital_power_up_wait_cycle = rtc_time_us_to_fastclk(mc->lp.power_up_wait_time_us, fastclk_period); @@ -197,6 +216,7 @@ const pmu_sleep_config_t* pmu_sleep_config_default( pmu_sleep_config_t *config, uint32_t pd_flags, uint32_t adjustment, + soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp @@ -207,7 +227,7 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->power = power_default; pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(pd_flags); - config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, pd_flags, adjustment, slowclk_period, fastclk_period); + config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, pd_flags, adjustment, slowclk_src, slowclk_period, fastclk_period); if (dslp) { config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c index 886b1e4495..f3c9d3b4fe 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c @@ -63,7 +63,7 @@ void pmu_sleep_disable_regdma_backup(void) pmu_hal_hp_set_sleep_active_backup_disable(PMU_instance()->hal); } -uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period) +uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period) { pmu_sleep_machine_constant_t *mc = (pmu_sleep_machine_constant_t *)PMU_instance()->mc; @@ -129,6 +129,7 @@ const pmu_sleep_config_t* pmu_sleep_config_default( pmu_sleep_config_t *config, uint32_t pd_flags, uint32_t adjustment, + soc_rtc_slow_clk_src_t slowclk_src, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 56625768f6..384c8f8271 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -879,7 +879,7 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m #if SOC_PMU_SUPPORTED pmu_sleep_config_t config; pmu_sleep_init(pmu_sleep_config_default(&config, sleep_flags, s_config.sleep_time_adjustment, - s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period, + rtc_clk_slow_src_get(), s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period, deep_sleep), deep_sleep); #else rtc_sleep_config_t config; @@ -1289,7 +1289,7 @@ esp_err_t esp_light_sleep_start(void) */ #if SOC_PMU_SUPPORTED int sleep_time_sw_adjustment = LIGHT_SLEEP_TIME_OVERHEAD_US + sleep_time_overhead_in + s_config.sleep_time_overhead_out; - int sleep_time_hw_adjustment = pmu_sleep_calculate_hw_wait_time(pd_flags, s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period); + int sleep_time_hw_adjustment = pmu_sleep_calculate_hw_wait_time(pd_flags, rtc_clk_slow_src_get(), s_config.rtc_clk_cal_period, s_config.fast_clk_cal_period); s_config.sleep_time_adjustment = sleep_time_sw_adjustment + sleep_time_hw_adjustment; #else uint32_t rtc_cntl_xtl_buf_wait_slp_cycles = rtc_time_us_to_slowclk(RTC_CNTL_XTL_BUF_WAIT_SLP_US, s_config.rtc_clk_cal_period); diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 134de3458f..18810def0f 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1295,6 +1295,10 @@ config SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE bool default y +config SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED + bool + default y + config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 25075cbf41..fc40204118 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -529,6 +529,7 @@ #define SOC_PM_PAU_LINK_NUM (4) #define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1) +#define SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED (1) /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/ #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1) From 92db088aa62548e7d83dfb4995de8434813abeb4 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Tue, 13 May 2025 19:10:30 +0800 Subject: [PATCH 6/6] fix(wifi): rx bcn failed when sta off channel under modem state --- components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld | 2 +- components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 2 +- components/esp_rom/esp32c3/ld/esp32c3.rom.ld | 2 +- components/esp_rom/esp32s3/ld/esp32s3.rom.ld | 2 +- components/esp_wifi/lib | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld index a2b5fb3cdb..ab75fdf888 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.eco4.ld @@ -203,7 +203,7 @@ pm_beacon_offset_init = 0x400030b0; pm_beacon_offset_deinit = 0x400030b4; pm_get_tbtt_count = 0x400030b8; pm_coex_schm_overall_period_get = 0x400030bc; -pm_coex_pwr_update = 0x400030c0; +//pm_coex_pwr_update = 0x400030c0; /* Data (.data, .bss, .rodata) */ s_pm_beacon_offset_ptr = 0x3fcdfa64; s_pm_beacon_offset_config_ptr = 0x3fcdfa60; diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index 6c0d7fbbff..585a527f42 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -603,7 +603,7 @@ pm_mac_sleep = 0x40001b80; pm_enable_active_timer = 0x40001b84; pm_enable_sleep_delay_timer = 0x40001b88; pm_local_tsf_process = 0x40001b8c; -pm_set_beacon_filter = 0x40001b90; +//pm_set_beacon_filter = 0x40001b90; /*pm_is_in_wifi_slice_threshold = 0x40001b94;*/ pm_is_waked = 0x40001b98; /*pm_keep_alive = 0x40001b9c;*/ diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index f99b43a4c8..372adbae3d 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -717,7 +717,7 @@ pm_mac_sleep = 0x4000165c; pm_enable_active_timer = 0x40001660; pm_enable_sleep_delay_timer = 0x40001664; pm_local_tsf_process = 0x40001668; -pm_set_beacon_filter = 0x4000166c; +//pm_set_beacon_filter = 0x4000166c; /*pm_is_in_wifi_slice_threshold = 0x40001670;*/ pm_is_waked = 0x40001674; /*pm_keep_alive = 0x40001678;*/ diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index d30639e516..b2e0305364 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -994,7 +994,7 @@ pm_mac_sleep = 0x40005454; pm_enable_active_timer = 0x40005460; pm_enable_sleep_delay_timer = 0x4000546c; pm_local_tsf_process = 0x40005478; -pm_set_beacon_filter = 0x40005484; +//pm_set_beacon_filter = 0x40005484; /*pm_is_in_wifi_slice_threshold = 0x40005490;*/ pm_is_waked = 0x4000549c; /*pm_keep_alive = 0x400054a8;*/ diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 8b68500820..83c236e25f 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 8b685008204d6be945f33cd22cb727cd7d33645c +Subproject commit 83c236e25f418d58b5e05bbac7409a9c9449ea24