Merge branch 'bugfix/gdma_uhci_id_5.0' into 'release/v5.0'

gdma: correct the dma trigger of UHCI && fix async memcpy conflict with peripheral DMA (v5.0) See merge request espressif/esp-idf!22006
2025-11-17 15:59:41 +01:00 · 2023-02-18 15:02:32 +08:00
parent 10dd0cc4a1 6b8d4dfe14
commit 27ca6549d5
15 changed files with 265 additions and 131 deletions
--- a/components/hal/esp32c2/include/hal/gdma_ll.h
+++ b/components/hal/esp32c2/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
+#include "hal/gdma_types.h"
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"

@@ -20,6 +21,10 @@ extern "C" {
 #define GDMA_LL_RX_EVENT_MASK       (0x06A7)
 #define GDMA_LL_TX_EVENT_MASK       (0x1958)

+// any "valid" peripheral ID can be used for M2M mode
+#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x185)
+#define GDMA_LL_INVALID_PERIPH_ID       (0x3F)
+
 #define GDMA_LL_EVENT_TX_FIFO_UDF   (1<<12)
 #define GDMA_LL_EVENT_TX_FIFO_OVF   (1<<11)
 #define GDMA_LL_EVENT_RX_FIFO_UDF   (1<<10)
@@ -35,19 +40,6 @@ extern "C" {
 #define GDMA_LL_EVENT_RX_DONE       (1<<0)

 ///////////////////////////////////// Common /////////////////////////////////////////
-/**
- * @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
- */
-static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->channel[channel].in.in_conf0.mem_trans_en = enable;
-    if (enable) {
-        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
-        dev->channel[channel].in.in_peri_sel.sel = 0;
-        dev->channel[channel].out.out_peri_sel.sel = 0;
-    }
-}
-
 /**
 * @brief Enable DMA clock gating
 */
@@ -255,9 +247,19 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA RX channel to a given peripheral
 */
-static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
    dev->channel[channel].in.in_peri_sel.sel = periph_id;
+    dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
+}
+
+/**
+ * @brief Disconnect DMA RX channel from peripheral
+ */
+static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.in_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+    dev->channel[channel].in.in_conf0.mem_trans_en = false;
 }

 ///////////////////////////////////// TX /////////////////////////////////////////
@@ -458,11 +460,20 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA TX channel to a given peripheral
 */
-static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
+    (void)periph;
    dev->channel[channel].out.out_peri_sel.sel = periph_id;
 }

+/**
+ * @brief Disconnect DMA TX channel from peripheral
+ */
+static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.out_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+}
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/hal/esp32c3/include/hal/gdma_ll.h
+++ b/components/hal/esp32c3/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
+#include "hal/gdma_types.h"
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"

@@ -20,6 +21,10 @@ extern "C" {
 #define GDMA_LL_RX_EVENT_MASK       (0x06A7)
 #define GDMA_LL_TX_EVENT_MASK       (0x1958)

+// any "valid" peripheral ID can be used for M2M mode
+#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x1CD)
+#define GDMA_LL_INVALID_PERIPH_ID       (0x3F)
+
 #define GDMA_LL_EVENT_TX_FIFO_UDF   (1<<12)
 #define GDMA_LL_EVENT_TX_FIFO_OVF   (1<<11)
 #define GDMA_LL_EVENT_RX_FIFO_UDF   (1<<10)
@@ -35,19 +40,6 @@ extern "C" {
 #define GDMA_LL_EVENT_RX_DONE       (1<<0)

 ///////////////////////////////////// Common /////////////////////////////////////////
-/**
- * @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
- */
-static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->channel[channel].in.in_conf0.mem_trans_en = enable;
-    if (enable) {
-        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
-        dev->channel[channel].in.in_peri_sel.sel = 0;
-        dev->channel[channel].out.out_peri_sel.sel = 0;
-    }
-}
-
 /**
 * @brief Enable DMA clock gating
 */
@@ -255,9 +247,19 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA RX channel to a given peripheral
 */
-static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
    dev->channel[channel].in.in_peri_sel.sel = periph_id;
+    dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
+}
+
+/**
+ * @brief Disconnect DMA RX channel from peripheral
+ */
+static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.in_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+    dev->channel[channel].in.in_conf0.mem_trans_en = false;
 }

 ///////////////////////////////////// TX /////////////////////////////////////////
@@ -458,11 +460,20 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA TX channel to a given peripheral
 */
-static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
+    (void)periph;
    dev->channel[channel].out.out_peri_sel.sel = periph_id;
 }

+/**
+ * @brief Disconnect DMA TX channel from peripheral
+ */
+static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.out_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+}
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/hal/esp32h2/include/hal/gdma_ll.h
+++ b/components/hal/esp32h2/include/hal/gdma_ll.h
@@ -8,6 +8,7 @@
 #include <stddef.h> /* Required for NULL constant */
 #include <stdint.h>
 #include <stdbool.h>
+#include "hal/gdma_types.h"
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"

@@ -20,6 +21,10 @@ extern "C" {
 #define GDMA_LL_RX_EVENT_MASK       (0x06A7)
 #define GDMA_LL_TX_EVENT_MASK       (0x1958)

+// any "valid" peripheral ID can be used for M2M mode
+#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK (0x1CD)
+#define GDMA_LL_INVALID_PERIPH_ID       (0x3F)
+
 #define GDMA_LL_EVENT_TX_FIFO_UDF   (1<<12)
 #define GDMA_LL_EVENT_TX_FIFO_OVF   (1<<11)
 #define GDMA_LL_EVENT_RX_FIFO_UDF   (1<<10)
@@ -35,19 +40,6 @@ extern "C" {
 #define GDMA_LL_EVENT_RX_DONE       (1<<0)

 ///////////////////////////////////// Common /////////////////////////////////////////
-/**
- * @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
- */
-static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->channel[channel].in.in_conf0.mem_trans_en = enable;
-    if (enable) {
-        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
-        dev->channel[channel].in.in_peri_sel.sel = 0;
-        dev->channel[channel].out.out_peri_sel.sel = 0;
-    }
-}
-
 /**
 * @brief Enable DMA clock gating
 */
@@ -255,9 +247,19 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA RX channel to a given peripheral
 */
-static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
    dev->channel[channel].in.in_peri_sel.sel = periph_id;
+    dev->channel[channel].in.in_conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
+}
+
+/**
+ * @brief Disconnect DMA RX channel from peripheral
+ */
+static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.in_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+    dev->channel[channel].in.in_conf0.mem_trans_en = false;
 }

 ///////////////////////////////////// TX /////////////////////////////////////////
@@ -458,11 +460,20 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA TX channel to a given peripheral
 */
-static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
+    (void)periph;
    dev->channel[channel].out.out_peri_sel.sel = periph_id;
 }

+/**
+ * @brief Disconnect DMA TX channel from peripheral
+ */
+static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.out_peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+}
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/hal/esp32s3/include/hal/gdma_ll.h
+++ b/components/hal/esp32s3/include/hal/gdma_ll.h
@@ -8,7 +8,7 @@
 #include <stddef.h> /* For NULL declaration */
 #include <stdint.h>
 #include <stdbool.h>
-#include "soc/soc_caps.h"
+#include "hal/gdma_types.h"
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"

@@ -21,6 +21,10 @@ extern "C" {
 #define GDMA_LL_RX_EVENT_MASK        (0x3FF)
 #define GDMA_LL_TX_EVENT_MASK        (0xFF)

+// any "valid" peripheral ID can be used for M2M mode
+#define GDMA_LL_M2M_FREE_PERIPH_ID_MASK  (0x3FF)
+#define GDMA_LL_INVALID_PERIPH_ID        (0x3F)
+
 #define GDMA_LL_EVENT_TX_L3_FIFO_UDF (1<<7)
 #define GDMA_LL_EVENT_TX_L3_FIFO_OVF (1<<6)
 #define GDMA_LL_EVENT_TX_L1_FIFO_UDF (1<<5)
@@ -49,19 +53,6 @@ extern "C" {
 #define GDMA_LL_EXT_MEM_BK_SIZE_64B (2)

 ///////////////////////////////////// Common /////////////////////////////////////////
-/**
- * @brief Enable DMA channel M2M mode (TX channel n forward data to RX channel n), disabled by default
- */
-static inline void gdma_ll_enable_m2m_mode(gdma_dev_t *dev, uint32_t channel, bool enable)
-{
-    dev->channel[channel].in.conf0.mem_trans_en = enable;
-    if (enable) {
-        // to enable m2m mode, the tx chan has to be the same to rx chan, and set to a valid value
-        dev->channel[channel].in.peri_sel.sel = 0;
-        dev->channel[channel].out.peri_sel.sel = 0;
-    }
-}
-
 /**
 * @brief Enable DMA clock gating
 */
@@ -303,9 +294,19 @@ static inline void gdma_ll_rx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA RX channel to a given peripheral
 */
-static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
    dev->channel[channel].in.peri_sel.sel = periph_id;
+    dev->channel[channel].in.conf0.mem_trans_en = (periph == GDMA_TRIG_PERIPH_M2M);
+}
+
+/**
+ * @brief Disconnect DMA RX channel from peripheral
+ */
+static inline void gdma_ll_rx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].in.peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+    dev->channel[channel].in.conf0.mem_trans_en = false;
 }

 ///////////////////////////////////// TX /////////////////////////////////////////
@@ -532,11 +533,20 @@ static inline void gdma_ll_tx_set_priority(gdma_dev_t *dev, uint32_t channel, ui
 /**
 * @brief Connect DMA TX channel to a given peripheral
 */
-static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, int periph_id)
+static inline void gdma_ll_tx_connect_to_periph(gdma_dev_t *dev, uint32_t channel, gdma_trigger_peripheral_t periph, int periph_id)
 {
+    (void)periph;
    dev->channel[channel].out.peri_sel.sel = periph_id;
 }

+/**
+ * @brief Disconnect DMA TX channel from peripheral
+ */
+static inline void gdma_ll_tx_disconnect_from_periph(gdma_dev_t *dev, uint32_t channel)
+{
+    dev->channel[channel].out.peri_sel.sel = GDMA_LL_INVALID_PERIPH_ID;
+}
+
 #ifdef __cplusplus
 }
 #endif
--- a/components/hal/include/hal/gdma_types.h
+++ b/components/hal/include/hal/gdma_types.h
@@ -0,0 +1,43 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enumeration of peripherals which have the DMA capability
+ * @note Some peripheral might not be available on certain chip, please refer to `soc_caps.h` for detail.
+ *
+ */
+typedef enum {
+    GDMA_TRIG_PERIPH_M2M,  /*!< GDMA trigger peripheral: M2M */
+    GDMA_TRIG_PERIPH_UHCI, /*!< GDMA trigger peripheral: UHCI */
+    GDMA_TRIG_PERIPH_SPI,  /*!< GDMA trigger peripheral: SPI */
+    GDMA_TRIG_PERIPH_I2S,  /*!< GDMA trigger peripheral: I2S */
+    GDMA_TRIG_PERIPH_AES,  /*!< GDMA trigger peripheral: AES */
+    GDMA_TRIG_PERIPH_SHA,  /*!< GDMA trigger peripheral: SHA */
+    GDMA_TRIG_PERIPH_ADC,  /*!< GDMA trigger peripheral: ADC */
+    GDMA_TRIG_PERIPH_DAC,  /*!< GDMA trigger peripheral: DAC */
+    GDMA_TRIG_PERIPH_LCD,  /*!< GDMA trigger peripheral: LCD */
+    GDMA_TRIG_PERIPH_CAM,  /*!< GDMA trigger peripheral: CAM */
+    GDMA_TRIG_PERIPH_RMT,  /*!< GDMA trigger peripheral: RMT */
+} gdma_trigger_peripheral_t;
+
+/**
+ * @brief Enumeration of GDMA channel direction
+ *
+ */
+typedef enum {
+    GDMA_CHANNEL_DIRECTION_TX, /*!< GDMA channel direction: TX */
+    GDMA_CHANNEL_DIRECTION_RX, /*!< GDMA channel direction: RX */
+} gdma_channel_direction_t;
+
+#ifdef __cplusplus
+}
+#endif