From 28fd413bf5ff2e2bf7834116e776ff25cfdc0f40 Mon Sep 17 00:00:00 2001 From: "zhiweijian@espressif.com" Date: Thu, 15 Oct 2020 20:57:29 +0800 Subject: [PATCH] fix ble restart faild when enable ble sleep --- components/esp32s3/system_api_esp32s3.c | 2 +- components/soc/esp32s3/include/soc/syscon_reg.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/components/esp32s3/system_api_esp32s3.c b/components/esp32s3/system_api_esp32s3.c index 924da6fd2b..01450bfcf2 100644 --- a/components/esp32s3/system_api_esp32s3.c +++ b/components/esp32s3/system_api_esp32s3.c @@ -93,7 +93,7 @@ void IRAM_ATTR esp_restart_noos(void) SYSTEM_BB_RST | SYSTEM_FE_RST | SYSTEM_MAC_RST | SYSTEM_BT_RST | SYSTEM_BTMAC_RST | SYSTEM_SDIO_RST | SYSTEM_SDIO_HOST_RST | SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | - SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST); + SYSTEM_RW_BTMAC_RST | SYSTEM_RW_BTLP_RST | SYSTEM_BLE_REG_RST | SYSTEM_PWR_REG_RST | SYSTEM_BB_REG_RST); REG_WRITE(SYSTEM_CORE_RST_EN_REG, 0); // Reset timer/spi/uart diff --git a/components/soc/esp32s3/include/soc/syscon_reg.h b/components/soc/esp32s3/include/soc/syscon_reg.h index 1eaeb09ff4..2ada57fd74 100644 --- a/components/soc/esp32s3/include/soc/syscon_reg.h +++ b/components/soc/esp32s3/include/soc/syscon_reg.h @@ -214,6 +214,9 @@ extern "C" { #define SYSTEM_WIFI_RST_M ((SYSTEM_WIFI_RST_V) << (SYSTEM_WIFI_RST_S)) #define SYSTEM_WIFI_RST_V 0xFFFFFFFF #define SYSTEM_WIFI_RST_S 0 +#define SYSTEM_BB_REG_RST (BIT(13)) +#define SYSTEM_PWR_REG_RST (BIT(12)) +#define SYSTEM_BLE_REG_RST (BIT(11)) #define SYSTEM_RW_BTLP_RST (BIT(10)) #define SYSTEM_RW_BTMAC_RST (BIT(9)) #define SYSTEM_MACPWR_RST (BIT(8))