esp_rom: extract common ets apis into esp_rom_sys.h

components/esp32/cache_err_int.c

@@ -32,7 +32,7 @@
 #include "hal/cpu_hal.h"
 
 #include "esp32/dport_access.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp32/rom/ets_sys.h" // for intr_matrix_set
 
 #include "sdkconfig.h"
 

components/esp32/clk.c

@@ -44,7 +44,7 @@ int IRAM_ATTR esp_clk_xtal_freq(void)
 
 void IRAM_ATTR ets_update_cpu_frequency(uint32_t ticks_per_us)
 {
-    /* Update scale factors used by ets_delay_us */
+    /* Update scale factors used by esp_rom_delay_us */
     g_ticks_per_us_pro = ticks_per_us;
 #ifndef CONFIG_FREERTOS_UNICORE
     g_ticks_per_us_app = ticks_per_us;

components/esp32/crosscore_int.c

@@ -19,8 +19,6 @@
 #include "esp_intr_alloc.h"
 #include "esp_debug_helpers.h"
 
-#include "esp32/rom/ets_sys.h"
-
 #include "soc/cpu.h"
 #include "soc/dport_reg.h"
 #include "soc/gpio_periph.h"

components/esp32/dport_access.c

@@ -26,7 +26,6 @@
 #include "esp_attr.h"
 #include "esp_err.h"
 #include "esp_intr_alloc.h"
-#include "esp32/rom/ets_sys.h"
 
 #include "soc/cpu.h"
 #include "soc/dport_reg.h"

components/esp32/sleep_modes.c

@@ -22,6 +22,7 @@
 #include "esp32/clk.h"
 #include "esp_newlib.h"
 #include "esp_spi_flash.h"
+#include "esp_rom_sys.h"
 #include "esp32/rom/cache.h"
 #include "esp32/rom/rtc.h"
 #include "esp_rom_uart.h"
@@ -132,11 +133,11 @@ void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
             _DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG) & (~DPORT_PRO_CACHE_MMU_IA_CLR));
 #if CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY > 0
     // ROM code has not started yet, so we need to set delay factor
-    // used by ets_delay_us first.
+    // used by esp_rom_delay_us first.
     ets_update_cpu_frequency_rom(ets_get_detected_xtal_freq() / 1000000);
     // This delay is configured in menuconfig, it can be used to give
     // the flash chip some time to become ready.
-    ets_delay_us(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY);
+    esp_rom_delay_us(CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY);
 #endif
 }
 
@@ -280,7 +281,7 @@ static esp_err_t esp_light_sleep_inner(uint32_t pd_flags,
     // If SPI flash was powered down, wait for it to become ready
     if (pd_flags & RTC_SLEEP_PD_VDDSDIO) {
         // Wait for the flash chip to start up
-        ets_delay_us(flash_enable_time_us);
+        esp_rom_delay_us(flash_enable_time_us);
     }
     return err;
 }

components/esp32/test/test_backtrace.c

@@ -9,6 +9,8 @@
 #include "freertos/task.h"
 #include "freertos/xtensa_api.h"
 #include "esp_intr_alloc.h"
+#include "esp_rom_sys.h"
+#include "esp_rom_uart.h"
 
 #define SW_ISR_LEVEL_1          7
 #define SW_ISR_LEVEL_3          29
@@ -72,12 +74,12 @@ TEST_CASE("Test backtrace from interrupt watchdog timeout", "[reset_reason][rese
 
 static void write_char_crash(char c)
 {
-    ets_write_char_uart(c);
+    esp_rom_uart_putc(c);
     *(char*) 0x00000001 = 0;
 }
 
 TEST_CASE("Test backtrace with a ROM function", "[reset_reason][reset=StoreProhibited,SW_CPU_RESET]")
 {
     ets_install_putc1(&write_char_crash);
-    ets_printf("foo");
+    esp_rom_printf("foo");
 }

components/esp32/test/test_delay.c

@@ -3,7 +3,7 @@
 #include <time.h>
 #include <sys/time.h>
 #include "unity.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -23,7 +23,7 @@ static void test_delay_task(void* p)
     uint64_t start = ref_clock_get();
     switch (arg->method) {
         case 0:
-            ets_delay_us(arg->delay_us);
+            esp_rom_delay_us(arg->delay_us);
             break;
         case 1:
             vTaskDelay(arg->delay_us / portTICK_PERIOD_MS / 1000);

components/esp32/test/test_fastbus.c

@@ -1,8 +1,7 @@
 
-#include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
 
+#include "esp_types.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"

components/esp32/test/test_intr_alloc.c

@@ -4,7 +4,7 @@
 
 #include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -69,7 +69,6 @@ static void timer_isr(void *arg)
         timer_group_clr_intr_status_in_isr(TIMER_GROUP_1, TIMER_1);
         timer_group_enable_alarm_in_isr(TIMER_GROUP_1, TIMER_1);
     }
-//  ets_printf("int %d\n", timer_idx);
 }
 
 
@@ -237,7 +236,7 @@ typedef struct {
 void IRAM_ATTR int_handler1(void* arg)
 {
     intr_alloc_test_ctx_t* ctx=(intr_alloc_test_ctx_t*)arg;
-    ets_printf("handler 1 called.\n");
+    esp_rom_printf("handler 1 called.\n");
     if ( ctx->flag1 ) {
         ctx->flag3 = true;
     } else {
@@ -249,7 +248,7 @@ void IRAM_ATTR int_handler1(void* arg)
 void IRAM_ATTR int_handler2(void* arg)
 {
     intr_alloc_test_ctx_t* ctx = (intr_alloc_test_ctx_t*)arg;
-    ets_printf("handler 2 called.\n");
+    esp_rom_printf("handler 2 called.\n");
     if ( ctx->flag2 ) {
         ctx->flag4 = true;
     } else {

components/esp32/test/test_pm.c

@@ -14,6 +14,7 @@
 #include "driver/rtc_io.h"
 #include "esp32/ulp.h"
 #include "soc/rtc_periph.h"
+#include "esp_rom_sys.h"
 
 #define MHZ     1000000
 
@@ -271,7 +272,7 @@ TEST_CASE("esp_timer produces correct delays with light sleep", "[pm]")
         p_args->intervals[p_args->cur_interval++] = ms_diff;
         // Deliberately make timer handler run longer.
         // We check that this doesn't affect the result.
-        ets_delay_us(10*1000);
+        esp_rom_delay_us(10*1000);
         if (p_args->cur_interval == NUM_INTERVALS) {
             printf("done\n");
             TEST_ESP_OK(esp_timer_stop(p_args->timer));

components/esp32/test/test_sleep.c

@@ -18,6 +18,7 @@
 #include "esp_newlib.h"
 #include "test_utils.h"
 #include "sdkconfig.h"
+#include "esp_rom_sys.h"
 
 
 #define ESP_EXT0_WAKEUP_LEVEL_LOW 0
@@ -101,7 +102,7 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]")
 {
     void timer_func(void* arg)
     {
-        ets_delay_us(50);
+        esp_rom_delay_us(50);
     }
 
     SemaphoreHandle_t done = xSemaphoreCreateCounting(2, 0);

components/esp32/test/test_spiram_cache_flush.c

@@ -4,7 +4,6 @@ This code tests the interaction between PSRAM and SPI flash routines.
 
 #include <esp_types.h>
 #include <stdio.h>
-#include "esp32/rom/ets_sys.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
@@ -15,7 +14,6 @@ This code tests the interaction between PSRAM and SPI flash routines.
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
-#include "esp32/rom/ets_sys.h"
 #include "esp_heap_caps.h"
 #include "esp_spi_flash.h"
 #include "esp_partition.h"

components/esp32/test/test_tsens.c

@@ -1,6 +1,6 @@
 #include <stdio.h>
 #include "unity.h"
-#include "esp32/rom/ets_sys.h"
+#include "esp_rom_sys.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
 
@@ -12,9 +12,9 @@ TEST_CASE("can control TSENS using registers", "[rtc][ignore]")
     CLEAR_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_DUMP_OUT);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP_FORCE);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP);
-    ets_delay_us(100);
+    esp_rom_delay_us(100);
     SET_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_DUMP_OUT);
-    ets_delay_us(5);
+    esp_rom_delay_us(5);
     int res = GET_PERI_REG_BITS2(SENS_SAR_SLAVE_ADDR3_REG, SENS_TSENS_OUT, SENS_TSENS_OUT_S);
     printf("res=%d\n", res);
 }