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Merge branch 'feature/re-enable-heap-test-c2' into 'master'
heap: re-enable temporarily disabled test on esp32c2 Closes IDF-5167 See merge request espressif/esp-idf!21828
This commit is contained in:
@@ -454,11 +454,13 @@ extern int _data_start;
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#define CONDITIONAL_NONE 0x0
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#define CONDITIONAL_NONE 0x0
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#define CONDITIONAL_RX PMP_R | PMP_X
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#define CONDITIONAL_RX PMP_R | PMP_X
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#define CONDITIONAL_RW PMP_R | PMP_W
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#define CONDITIONAL_RW PMP_R | PMP_W
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#define CONDITIONAL_RWX PMP_R | PMP_W | PMP_X
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#else
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#else
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// With L bit set
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// With L bit set
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#define CONDITIONAL_NONE NONE
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#define CONDITIONAL_NONE NONE
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#define CONDITIONAL_RX RX
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#define CONDITIONAL_RX RX
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#define CONDITIONAL_RW RW
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#define CONDITIONAL_RW RW
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#define CONDITIONAL_RWX RWX
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#endif
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#endif
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void esp_cpu_configure_region_protection(void)
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void esp_cpu_configure_region_protection(void)
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@@ -525,7 +527,12 @@ void esp_cpu_configure_region_protection(void)
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} else {
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} else {
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// 1. IRAM
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// 1. IRAM
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PMP_ENTRY_SET(0, SOC_DIRAM_IRAM_LOW, CONDITIONAL_NONE);
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PMP_ENTRY_SET(0, SOC_DIRAM_IRAM_LOW, CONDITIONAL_NONE);
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#if CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RX);
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RX);
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#else
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PMP_ENTRY_SET(1, IRAM_END, PMP_TOR | CONDITIONAL_RWX);
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#endif
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// 2. DRAM
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// 2. DRAM
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PMP_ENTRY_SET(2, DRAM_START, CONDITIONAL_NONE);
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PMP_ENTRY_SET(2, DRAM_START, CONDITIONAL_NONE);
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@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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*/
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@@ -15,8 +15,6 @@
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#define ALLOC_SZ 1024
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#define ALLOC_SZ 1024
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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static void *malloc_block_diram(uint32_t caps)
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static void *malloc_block_diram(uint32_t caps)
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{
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{
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@@ -81,4 +79,3 @@ TEST_CASE("Allocate D/IRAM as IRAM", "[heap]")
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free(iram);
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free(iram);
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}
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}
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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*/
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@@ -18,9 +18,6 @@
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#include <stdlib.h>
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#include <stdlib.h>
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#include <sys/param.h>
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#include <sys/param.h>
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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TEST_CASE("Capabilities allocator test", "[heap]")
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TEST_CASE("Capabilities allocator test", "[heap]")
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{
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{
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@@ -112,7 +109,6 @@ TEST_CASE("Capabilities allocator test", "[heap]")
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printf("Done.\n");
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printf("Done.\n");
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}
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}
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
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#ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY
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TEST_CASE("IRAM_8BIT capability test", "[heap]")
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TEST_CASE("IRAM_8BIT capability test", "[heap]")
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@@ -175,8 +171,6 @@ TEST_CASE("heap_caps metadata test", "[heap]")
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TEST_ASSERT(after.minimum_free_bytes < original.total_free_bytes);
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TEST_ASSERT(after.minimum_free_bytes < original.total_free_bytes);
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}
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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/* Small function runs from IRAM to check that malloc/free/realloc
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/* Small function runs from IRAM to check that malloc/free/realloc
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all work OK when cache is disabled...
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all work OK when cache is disabled...
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*/
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*/
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@@ -203,7 +197,6 @@ TEST_CASE("heap_caps_xxx functions work with flash cache disabled", "[heap]")
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TEST_ASSERT( iram_malloc_test() );
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TEST_ASSERT( iram_malloc_test() );
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}
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}
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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#ifdef CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS
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#ifdef CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS
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TEST_CASE("When enabled, allocation operation failure generates an abort", "[heap][reset=abort,SW_CPU_RESET]")
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TEST_CASE("When enabled, allocation operation failure generates an abort", "[heap][reset=abort,SW_CPU_RESET]")
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@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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*/
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@@ -28,8 +28,6 @@ TEST_CASE("realloc shrink buffer in place", "[heap]")
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#endif
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#endif
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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//IDF-5167
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#ifndef CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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TEST_CASE("realloc shrink buffer with EXEC CAPS", "[heap]")
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TEST_CASE("realloc shrink buffer with EXEC CAPS", "[heap]")
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{
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{
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@@ -70,4 +68,3 @@ TEST_CASE("realloc move data to a new heap type", "[heap]")
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free(c);
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free(c);
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}
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}
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif // CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
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@@ -1,6 +1,7 @@
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CONFIG_COMPILER_DUMP_RTL_FILES=y
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CONFIG_COMPILER_DUMP_RTL_FILES=y
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n # memory protection needs to be disabled for certain tests
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n # memory protection needs to be disabled for certain tests
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n # for c2 and c6 this config must be disabled for certain tests
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CONFIG_COMPILER_STACK_CHECK_MODE_ALL=y
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CONFIG_COMPILER_STACK_CHECK_MODE_ALL=y
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CONFIG_COMPILER_STACK_CHECK=y
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CONFIG_COMPILER_STACK_CHECK=y
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