clk_tree: Add a general API to get the frequency of different clocks

Add basic clk_tree driver and hal implementation.
This commit is contained in:
Song Ruo Jing
2022-12-28 15:04:51 +08:00
parent 1bf040e0b6
commit 2c9aa4559c
58 changed files with 1800 additions and 24 deletions
@@ -615,6 +615,10 @@ config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y
config SOC_CLK_OSC_SLOW_SUPPORTED
bool
default y
config SOC_WIFI_HW_TSF
bool
default y
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -110,6 +110,7 @@ typedef enum {
SOC_MOD_CLK_RC_FAST, /*!< RC_FAST_CLK comes from the internal 20MHz rc oscillator, passing a clock gating to the peripherals */
SOC_MOD_CLK_RC_FAST_D256, /*!< RC_FAST_D256_CLK comes from the internal 20MHz rc oscillator, divided by 256, and passing a clock gating to the peripherals */
SOC_MOD_CLK_XTAL, /*!< XTAL_CLK comes from the external 26/40MHz crystal */
SOC_MOD_CLK_INVALID, /*!< Indication of the end of the available module clock sources */
} soc_module_clk_t;
//////////////////////////////////////////////////SYSTIMER///////////////////////////////////////////////////////////////
@@ -294,6 +294,8 @@
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
#define SOC_CLK_OSC_SLOW_SUPPORTED (1) /*!< ESP32C2 only supports to connect an external oscillator, not a crystal */
/*------------------------------------ WI-FI CAPS ------------------------------------*/
#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */
#define SOC_WIFI_FTM_SUPPORT (0) /*!< FTM is not supported */