systimer: add HAL layer

components/soc/src/esp32s2/CMakeLists.txt

@@ -6,6 +6,7 @@ set(srcs "brownout_hal.c"
         "rtc_sleep.c"
         "rtc_time.c"
         "soc_memory_layout.c"
+        "systimer_hal.c"
         "touch_sensor_hal.c"
         "usb_hal.c")
 

components/soc/src/esp32s2/include/hal/systimer_ll.h

@@ -0,0 +1,138 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "soc/soc.h"
+#include "soc/systimer_reg.h"
+
+// All these functions get invoked either from ISR or HAL that linked to IRAM.
+// Always inline these functions even no gcc optimization is applied.
+
+/*******************counter*************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_clock(void)
+{
+    REG_SET_BIT(SYSTIMER_CONF_REG, SYSTIMER_CLK_EN);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_apply_counter_value(void)
+{
+    REG_SET_BIT(SYSTIMER_LOAD_REG, SYSTIMER_TIMER_LOAD);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_load_counter_value(uint64_t value)
+{
+    REG_WRITE(SYSTIMER_LOAD_LO_REG, value & 0xFFFFFFFF);
+    REG_WRITE(SYSTIMER_LOAD_HI_REG, (value & 0xFFFFFFFF00000000) >> 32);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_set_step_for_pll(uint32_t step)
+{
+    REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_PLL_STEP, step);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_set_step_for_xtal(uint32_t step)
+{
+    REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_XTAL_STEP, step);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_counter_snapshot(void)
+{
+    REG_WRITE(SYSTIMER_UPDATE_REG, SYSTIMER_TIMER_UPDATE);
+}
+
+__attribute__((always_inline)) static inline bool systimer_ll_is_counter_value_valid(void)
+{
+    return REG_GET_BIT(SYSTIMER_UPDATE_REG, SYSTIMER_TIMER_VALUE_VALID);
+}
+
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_low(void)
+{
+    return REG_READ(SYSTIMER_VALUE_LO_REG);
+}
+
+__attribute__((always_inline)) static inline uint32_t systimer_ll_get_counter_value_high(void)
+{
+    return REG_READ(SYSTIMER_VALUE_HI_REG);
+}
+
+/*******************alarm*************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_value(uint32_t alarm_id, uint64_t value)
+{
+    REG_WRITE(SYSTIMER_TARGET0_LO_REG + alarm_id * 8, value & 0xFFFFFFFF);
+    REG_WRITE(SYSTIMER_TARGET0_HI_REG + alarm_id * 8, (value & 0xFFFFFFFF00000000) >> 32);
+}
+
+__attribute__((always_inline)) static inline uint64_t systimer_ll_get_alarm_value(uint32_t alarm_id)
+{
+    return (uint64_t)REG_READ(SYSTIMER_TARGET0_HI_REG + alarm_id * 8) << 32 | REG_READ(SYSTIMER_TARGET0_LO_REG + alarm_id * 8);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm(uint32_t alarm_id)
+{
+    REG_SET_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(31));
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_disable_alarm(uint32_t alarm_id)
+{
+    REG_CLR_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(31));
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_oneshot(uint32_t alarm_id)
+{
+    REG_CLR_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(30));
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_period(uint32_t alarm_id)
+{
+    REG_SET_BIT(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, BIT(30));
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_set_alarm_period(uint32_t alarm_id, uint32_t period)
+{
+    REG_SET_FIELD(SYSTIMER_TARGET0_CONF_REG + alarm_id * 4, SYSTIMER_TARGET0_PERIOD, period);
+}
+
+/*******************interrupt*************************/
+
+__attribute__((always_inline)) static inline void systimer_ll_enable_alarm_int(uint32_t alarm_id)
+{
+    REG_SET_BIT(SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_disable_alarm_int(uint32_t alarm_id)
+{
+    REG_CLR_BIT(SYSTIMER_INT_ENA_REG, 1 << alarm_id);
+}
+
+__attribute__((always_inline)) static inline bool systimer_ll_is_alarm_int_fired(uint32_t alarm_id)
+{
+    return REG_GET_BIT(SYSTIMER_INT_RAW_REG, 1 << alarm_id);
+}
+
+__attribute__((always_inline)) static inline void systimer_ll_clear_alarm_int(uint32_t alarm_id)
+{
+    REG_SET_BIT(SYSTIMER_INT_CLR_REG, 1 << alarm_id);
+}
+
+#ifdef __cplusplus
+}
+#endif

components/soc/src/esp32s2/systimer_hal.c

@@ -0,0 +1,140 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <sys/param.h>
+#include <assert.h>
+#include "hal/systimer_hal.h"
+#include "hal/systimer_ll.h"
+#include "hal/systimer_types.h"
+#include "soc/systimer_caps.h"
+#include "soc/rtc.h"
+
+#define SYSTIMER_TICKS_PER_US (80) // Number of timer ticks per microsecond
+
+uint64_t systimer_hal_get_counter_value(systimer_counter_id_t counter_id)
+{
+    uint32_t lo, lo_start, hi;
+    /* Set the "update" bit and wait for acknowledgment */
+    systimer_ll_counter_snapshot();
+    while (!systimer_ll_is_counter_value_valid());
+    /* Read LO, HI, then LO again, check that LO returns the same value.
+     * This accounts for the case when an interrupt may happen between reading
+     * HI and LO values, and this function may get called from the ISR.
+     * In this case, the repeated read will return consistent values.
+     */
+    lo_start = systimer_ll_get_counter_value_low();
+    do {
+        lo = lo_start;
+        hi = systimer_ll_get_counter_value_high();
+        lo_start = systimer_ll_get_counter_value_low();
+    } while (lo_start != lo);
+
+    systimer_counter_value_t result = {
+        .lo = lo,
+        .hi = hi
+    };
+
+    return result.val;
+}
+
+uint64_t systimer_hal_get_time(systimer_counter_id_t counter_id)
+{
+    return systimer_hal_get_counter_value(counter_id) / SYSTIMER_TICKS_PER_US;
+}
+
+void systimer_hal_set_alarm_value(systimer_alarm_id_t alarm_id, uint64_t timestamp)
+{
+    int64_t offset = SYSTIMER_TICKS_PER_US * 2;
+    uint64_t now_time = systimer_hal_get_counter_value(SYSTIMER_COUNTER_0);
+    systimer_counter_value_t alarm = { .val = MAX(timestamp * SYSTIMER_TICKS_PER_US, now_time + offset) };
+    do {
+        systimer_ll_disable_alarm(alarm_id);
+        systimer_ll_set_alarm_value(alarm_id, alarm.val);
+        systimer_ll_enable_alarm(alarm_id);
+        now_time = systimer_hal_get_counter_value(SYSTIMER_COUNTER_0);
+        int64_t delta = (int64_t)alarm.val - (int64_t)now_time;
+        if (delta <= 0 && !systimer_ll_is_alarm_int_fired(alarm_id)) {
+            // new alarm is less than the counter and the interrupt flag is not set
+            offset += -1 * delta + SYSTIMER_TICKS_PER_US * 2;
+            alarm.val = now_time + offset;
+        } else {
+            // finish if either (alarm > counter) or the interrupt flag is already set.
+            break;
+        }
+    } while (1);
+}
+
+uint64_t systimer_hal_get_alarm_value(systimer_alarm_id_t alarm_id)
+{
+    return systimer_ll_get_alarm_value(alarm_id);
+}
+
+void systimer_hal_enable_alarm_int(systimer_alarm_id_t alarm_id)
+{
+    systimer_ll_enable_alarm_int(alarm_id);
+}
+
+void systimer_hal_on_apb_freq_update(uint32_t apb_ticks_per_us)
+{
+    /* If this function was called when switching APB clock to PLL, don't need
+     * do anything: the SYSTIMER_TIMER_PLL_STEP is already correct.
+     * If this was called when switching APB clock to XTAL, need to adjust
+     * XTAL_STEP value accordingly.
+     */
+    if (apb_ticks_per_us != SYSTIMER_TICKS_PER_US) {
+        assert((SYSTIMER_TICKS_PER_US % apb_ticks_per_us) == 0 && "TICK_PER_US should be divisible by APB frequency (in MHz)");
+        systimer_ll_set_step_for_xtal(SYSTIMER_TICKS_PER_US / apb_ticks_per_us);
+    }
+}
+
+void systimer_hal_counter_value_advance(systimer_counter_id_t counter_id, int64_t time_us)
+{
+    systimer_counter_value_t new_count = { .val = systimer_hal_get_counter_value(counter_id) + time_us * SYSTIMER_TICKS_PER_US };
+    systimer_ll_load_counter_value(new_count.val);
+    systimer_ll_apply_counter_value();
+}
+
+void systimer_hal_enable_counter(systimer_counter_id_t counter_id)
+{
+    systimer_ll_enable_clock();
+}
+
+void systimer_hal_init(void)
+{
+    assert(rtc_clk_xtal_freq_get() == 40 && "update the step for xtal to support other XTAL:APB frequency ratios");
+    /* Configure the counter:
+     * - increment by 1 when running from PLL (80 ticks per microsecond),
+     * - increment by 2 when running from XTAL (40 ticks per microsecond).
+     * Note that if the APB frequency is derived from XTAL with divider != 1,
+     * XTAL_STEP needs to be adjusted accordingly. For example, if
+     * the APB frequency is XTAL/4 = 10 MHz, then XTAL_STEP should be set to 8.
+     * This is handled in systimer_hal_on_apb_freq_update function.
+     */
+    systimer_ll_set_step_for_pll(1);
+    systimer_ll_set_step_for_xtal(2);
+}
+
+void systimer_hal_select_alarm_mode(systimer_alarm_id_t alarm_id, systimer_alarm_mode_t mode)
+{
+    switch (mode) {
+    case SYSTIMER_ALARM_MODE_ONESHOT:
+        systimer_ll_enable_alarm_oneshot(alarm_id);
+        break;
+    case SYSTIMER_ALARM_MODE_PERIOD:
+        systimer_ll_enable_alarm_period(alarm_id);
+        break;
+    default:
+        break;
+    }
+}