From 2e4784611dcac2f87e0b0b9ed00628fd1b83ed72 Mon Sep 17 00:00:00 2001 From: Wu Zheng Hui Date: Mon, 30 May 2022 11:15:16 +0800 Subject: [PATCH] efuse: update efuse name (backport v4.4) --- .../flash_encryption_secure_features.c | 2 +- .../src/esp32c3/secure_boot_secure_features.c | 2 +- .../src/esp32h2/flash_encrypt.c | 2 +- .../src/esp32h2/secure_boot.c | 2 +- .../flash_encryption_secure_features.c | 2 +- .../src/esp32s3/secure_boot_secure_features.c | 2 +- components/efuse/esp32c3/esp_efuse_table.c | 30 ++--- components/efuse/esp32c3/esp_efuse_table.csv | 8 +- .../efuse/esp32c3/include/esp_efuse_table.h | 8 +- components/efuse/esp32h2/esp_efuse_table.c | 30 ++--- components/efuse/esp32h2/esp_efuse_table.csv | 8 +- .../efuse/esp32h2/include/esp_efuse_table.h | 8 +- components/efuse/esp32s3/esp_efuse_table.c | 41 +++--- components/efuse/esp32s3/esp_efuse_table.csv | 9 +- .../efuse/esp32s3/include/esp_efuse_table.h | 11 +- components/esp_rom/esp32c3/ld/esp32c3.rom.ld | 3 +- components/esp_rom/esp32h2/ld/esp32h2.rom.ld | 3 +- components/esp_rom/esp32s3/ld/esp32s3.rom.ld | 3 +- .../esp_rom/include/esp32c3/rom/efuse.h | 26 ++-- .../esp_rom/include/esp32h2/rom/efuse.h | 26 ++-- .../esp_rom/include/esp32s3/rom/efuse.h | 26 ++-- components/esptool_py/esptool | 2 +- .../soc/esp32c3/include/soc/efuse_reg.h | 108 +++++++-------- .../soc/esp32c3/include/soc/efuse_struct.h | 48 +++---- .../soc/esp32h2/include/soc/efuse_reg.h | 125 ++++++++---------- .../soc/esp32h2/include/soc/efuse_struct.h | 38 +++--- .../soc/esp32s3/include/soc/efuse_reg.h | 110 +++++++-------- .../soc/esp32s3/include/soc/efuse_struct.h | 18 +-- .../system/inc/espefuse_summary_ESP32-C3.rst | 6 +- .../system/inc/espefuse_summary_ESP32-S3.rst | 6 +- 30 files changed, 344 insertions(+), 369 deletions(-) diff --git a/components/bootloader_support/src/esp32c3/flash_encryption_secure_features.c b/components/bootloader_support/src/esp32c3/flash_encryption_secure_features.c index d00f2d9e15..16795b5254 100644 --- a/components/bootloader_support/src/esp32c3/flash_encryption_secure_features.c +++ b/components/bootloader_support/src/esp32c3/flash_encryption_secure_features.c @@ -38,7 +38,7 @@ esp_err_t esp_flash_encryption_enable_secure_features(void) ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED"); #endif - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); #if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS) // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot diff --git a/components/bootloader_support/src/esp32c3/secure_boot_secure_features.c b/components/bootloader_support/src/esp32c3/secure_boot_secure_features.c index 4226493ce1..a460dbce5e 100644 --- a/components/bootloader_support/src/esp32c3/secure_boot_secure_features.c +++ b/components/bootloader_support/src/esp32c3/secure_boot_secure_features.c @@ -16,7 +16,7 @@ static __attribute__((unused)) const char *TAG = "secure_boot"; esp_err_t esp_secure_boot_enable_secure_features(void) { - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); #ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE ESP_LOGI(TAG, "Enabling Security download mode..."); diff --git a/components/bootloader_support/src/esp32h2/flash_encrypt.c b/components/bootloader_support/src/esp32h2/flash_encrypt.c index b0a6190f2d..448666bfc7 100644 --- a/components/bootloader_support/src/esp32h2/flash_encrypt.c +++ b/components/bootloader_support/src/esp32h2/flash_encrypt.c @@ -142,7 +142,7 @@ static esp_err_t initialise_flash_encryption(void) ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED"); #endif - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); esp_err_t err = esp_efuse_batch_write_commit(); if (err != ESP_OK) { diff --git a/components/bootloader_support/src/esp32h2/secure_boot.c b/components/bootloader_support/src/esp32h2/secure_boot.c index f5a44d259e..2edd7415fd 100644 --- a/components/bootloader_support/src/esp32h2/secure_boot.c +++ b/components/bootloader_support/src/esp32h2/secure_boot.c @@ -248,7 +248,7 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag return key_state; } - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); esp_err_t err = ESP_FAIL; #ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE diff --git a/components/bootloader_support/src/esp32s3/flash_encryption_secure_features.c b/components/bootloader_support/src/esp32s3/flash_encryption_secure_features.c index 3d932104da..3e5437051b 100644 --- a/components/bootloader_support/src/esp32s3/flash_encryption_secure_features.c +++ b/components/bootloader_support/src/esp32s3/flash_encryption_secure_features.c @@ -39,7 +39,7 @@ esp_err_t esp_flash_encryption_enable_secure_features(void) ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED"); #endif - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); #if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS) // This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot diff --git a/components/bootloader_support/src/esp32s3/secure_boot_secure_features.c b/components/bootloader_support/src/esp32s3/secure_boot_secure_features.c index 9be4c8edd4..fcccf66266 100644 --- a/components/bootloader_support/src/esp32s3/secure_boot_secure_features.c +++ b/components/bootloader_support/src/esp32s3/secure_boot_secure_features.c @@ -16,7 +16,7 @@ static __attribute__((unused)) const char *TAG = "secure_boot"; esp_err_t esp_secure_boot_enable_secure_features(void) { - esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT); + esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT); #ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE ESP_LOGI(TAG, "Enabling Security download mode..."); diff --git a/components/efuse/esp32c3/esp_efuse_table.c b/components/efuse/esp32c3/esp_efuse_table.c index 01925a833d..0dc6942f09 100644 --- a/components/efuse/esp32c3/esp_efuse_table.c +++ b/components/efuse/esp32c3/esp_efuse_table.c @@ -9,7 +9,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table 720eb12a076091cb1a236c15d9fa3308 +// md5_digest_table 357feb63f27b95519accb97200d894a7 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -80,7 +80,7 @@ static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; static const esp_efuse_desc_t WR_DIS_GROUP_3[] = { - {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, + {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, }; static const esp_efuse_desc_t WR_DIS_BLK1[] = { @@ -283,16 +283,16 @@ static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7, }; -static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = { - {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4, +static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = { + {EFUSE_BLK0, 129, 1}, // Disable direct boot mode, }; -static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = { - {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + {EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot, }; -static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = { - {EFUSE_BLK0, 132, 1}, // Disable download through USB, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + {EFUSE_BLK0, 132, 1}, // Disable download through USB-Serial-JTAG, }; static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = { @@ -569,7 +569,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = { - &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION NULL }; @@ -823,18 +823,18 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = { NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = { - &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 +const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = { + &DIS_DIRECT_BOOT[0], // Disable direct boot mode NULL }; -const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = { - &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1 +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = { - &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Disable download through USB-Serial-JTAG NULL }; diff --git a/components/efuse/esp32c3/esp_efuse_table.csv b/components/efuse/esp32c3/esp_efuse_table.csv index 5ae872382c..83774e5e70 100644 --- a/components/efuse/esp32c3/esp_efuse_table.csv +++ b/components/efuse/esp32c3/esp_efuse_table.csv @@ -29,7 +29,7 @@ WR_DIS.KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5 WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE - WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION WR_DIS.BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1 WR_DIS.USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA @@ -88,9 +88,9 @@ # EFUSE_RD_REPEAT_DATA3_REG # DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7 - DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 - UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1 - DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB + DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, Disable direct boot mode + DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, Disable usb serial jtag print during rom boot + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,EFUSE_BLK0, 132, 1, Disable download through USB-Serial-JTAG ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print. FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot diff --git a/components/efuse/esp32c3/include/esp_efuse_table.h b/components/efuse/esp32c3/include/esp_efuse_table.h index d095ea1029..d8fe2d9681 100644 --- a/components/efuse/esp32c3/include/esp_efuse_table.h +++ b/components/efuse/esp32c3/include/esp_efuse_table.h @@ -9,7 +9,7 @@ extern "C" { #endif -// md5_digest_table 720eb12a076091cb1a236c15d9fa3308 +// md5_digest_table 357feb63f27b95519accb97200d894a7 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -83,9 +83,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[]; extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[]; extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[]; -extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[]; extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[]; extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[]; extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[]; diff --git a/components/efuse/esp32h2/esp_efuse_table.c b/components/efuse/esp32h2/esp_efuse_table.c index 1c19b6db40..7c86a5e257 100644 --- a/components/efuse/esp32h2/esp_efuse_table.c +++ b/components/efuse/esp32h2/esp_efuse_table.c @@ -9,7 +9,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table d3317916050c9ac3f0b2056ee72173af +// md5_digest_table 59f7d6fe9d8c226d79020dfed7880683 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -80,7 +80,7 @@ static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; static const esp_efuse_desc_t WR_DIS_GROUP_3[] = { - {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, + {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, }; static const esp_efuse_desc_t WR_DIS_BLK1[] = { @@ -283,16 +283,16 @@ static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7, }; -static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = { - {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4, +static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = { + {EFUSE_BLK0, 129, 1}, // Disable direct boot mode, }; -static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = { - {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + {EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot, }; -static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = { - {EFUSE_BLK0, 132, 1}, // Disable download through USB, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + {EFUSE_BLK0, 132, 1}, // Disable download through USB-Serial-JTAG, }; static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = { @@ -554,7 +554,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = { - &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION NULL }; @@ -808,18 +808,18 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = { NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = { - &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 +const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = { + &DIS_DIRECT_BOOT[0], // Disable direct boot mode NULL }; -const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = { - &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1 +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = { - &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Disable download through USB-Serial-JTAG NULL }; diff --git a/components/efuse/esp32h2/esp_efuse_table.csv b/components/efuse/esp32h2/esp_efuse_table.csv index a271dca176..884f12fdc9 100644 --- a/components/efuse/esp32h2/esp_efuse_table.csv +++ b/components/efuse/esp32h2/esp_efuse_table.csv @@ -30,7 +30,7 @@ WR_DIS.KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5 WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE - WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION WR_DIS.BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1 WR_DIS.USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA @@ -89,9 +89,9 @@ # EFUSE_RD_REPEAT_DATA3_REG # DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7 - DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 - UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1 - DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB + DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, Disable direct boot mode + DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, Disable usb serial jtag print during rom boot + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,EFUSE_BLK0, 132, 1, Disable download through USB-Serial-JTAG ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print. FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot diff --git a/components/efuse/esp32h2/include/esp_efuse_table.h b/components/efuse/esp32h2/include/esp_efuse_table.h index 5c0bdd31a8..69c57fd717 100644 --- a/components/efuse/esp32h2/include/esp_efuse_table.h +++ b/components/efuse/esp32h2/include/esp_efuse_table.h @@ -9,7 +9,7 @@ extern "C" { #endif -// md5_digest_table d3317916050c9ac3f0b2056ee72173af +// md5_digest_table 59f7d6fe9d8c226d79020dfed7880683 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -83,9 +83,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[]; extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[]; extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[]; -extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[]; extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[]; extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[]; extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[]; diff --git a/components/efuse/esp32s3/esp_efuse_table.c b/components/efuse/esp32s3/esp_efuse_table.c index def11dd3b6..fc94538b20 100644 --- a/components/efuse/esp32s3/esp_efuse_table.c +++ b/components/efuse/esp32s3/esp_efuse_table.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,7 +9,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table 9444b887379d924049af42806ca71d45 +// md5_digest_table 62fa98bed350ebc4951c5f8191c487de // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -80,7 +80,7 @@ static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; static const esp_efuse_desc_t WR_DIS_GROUP_3[] = { - {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, + {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION, }; static const esp_efuse_desc_t WR_DIS_BLK1[] = { @@ -303,20 +303,20 @@ static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = { {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7, }; -static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = { - {EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4, +static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = { + {EFUSE_BLK0, 129, 1}, // Disable direct boot mode, }; -static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = { - {EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + {EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot, }; static const esp_efuse_desc_t FLASH_ECC_MODE[] = { {EFUSE_BLK0, 131, 1}, // Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode, }; -static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = { - {EFUSE_BLK0, 132, 1}, // Disable download through USB, +static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + {EFUSE_BLK0, 132, 1}, // Set this bit to disable download through USB-Serial-JTAG, }; static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = { @@ -351,6 +351,10 @@ static const esp_efuse_desc_t SECURE_VERSION[] = { {EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback, }; +static const esp_efuse_desc_t DIS_USB_OTG_DOWNLOAD_MODE[] = { + {EFUSE_BLK0, 159, 1}, // Set this bit to disable download through USB-OTG, +}; + static const esp_efuse_desc_t MAC_FACTORY[] = { {EFUSE_BLK1, 40, 8}, // Factory MAC addr [0], {EFUSE_BLK1, 32, 8}, // Factory MAC addr [1], @@ -617,7 +621,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = { }; const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = { - &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION NULL }; @@ -896,13 +900,13 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = { NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = { - &DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 +const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = { + &DIS_DIRECT_BOOT[0], // Disable direct boot mode NULL }; -const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = { - &UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1 +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = { + &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot NULL }; @@ -911,8 +915,8 @@ const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = { NULL }; -const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = { - &DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = { + &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Set this bit to disable download through USB-Serial-JTAG NULL }; @@ -956,6 +960,11 @@ const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = { NULL }; +const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_OTG_DOWNLOAD_MODE[] = { + &DIS_USB_OTG_DOWNLOAD_MODE[0], // Set this bit to disable download through USB-OTG + NULL +}; + const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = { &MAC_FACTORY[0], // Factory MAC addr [0] &MAC_FACTORY[1], // Factory MAC addr [1] diff --git a/components/efuse/esp32s3/esp_efuse_table.csv b/components/efuse/esp32s3/esp_efuse_table.csv index 4242375a2f..e8c198b7f9 100644 --- a/components/efuse/esp32s3/esp_efuse_table.csv +++ b/components/efuse/esp32s3/esp_efuse_table.csv @@ -28,7 +28,7 @@ WR_DIS.KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5 WR_DIS.SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN WR_DIS.SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE - WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION + WR_DIS.GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION WR_DIS.BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS WR_DIS.SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1 WR_DIS.USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA @@ -92,10 +92,10 @@ # EFUSE_RD_REPEAT_DATA3_REG # DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7 - DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4 - UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1 + DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, Disable direct boot mode + DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, Disable usb serial jtag print during rom boot FLASH_ECC_MODE, EFUSE_BLK0, 131, 1, Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode - DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,EFUSE_BLK0, 132, 1, Set this bit to disable download through USB-Serial-JTAG ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print. PIN_POWER_SELECTION, EFUSE_BLK0, 136, 1, GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI. @@ -104,6 +104,7 @@ FLASH_ECC_EN, EFUSE_BLK0, 140, 1, Enables ECC in Flash boot mode FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot SECURE_VERSION, EFUSE_BLK0, 142, 16, Secure version for anti-rollback + DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 159, 1, Set this bit to disable download through USB-OTG # EFUSE_RD_REPEAT_DATA4_REG # diff --git a/components/efuse/esp32s3/include/esp_efuse_table.h b/components/efuse/esp32s3/include/esp_efuse_table.h index 3618ae3dda..b81d10f18b 100644 --- a/components/efuse/esp32s3/include/esp_efuse_table.h +++ b/components/efuse/esp32s3/include/esp_efuse_table.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,7 +9,7 @@ extern "C" { #endif -// md5_digest_table 9444b887379d924049af42806ca71d45 +// md5_digest_table 62fa98bed350ebc4951c5f8191c487de // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -88,10 +88,10 @@ extern const esp_efuse_desc_t* ESP_EFUSE_STRAP_JTAG_SEL[]; extern const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[]; extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[]; -extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[]; extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[]; -extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[]; extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[]; extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[]; extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[]; @@ -100,6 +100,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[]; extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[]; extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[]; extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[]; +extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_OTG_DOWNLOAD_MODE[]; extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[]; extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[]; diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index f87a25a07c..74e5bcccf8 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -482,7 +482,8 @@ ets_efuse_get_flash_delay_us = 0x40000714; ets_efuse_get_mac = 0x40000718; ets_efuse_get_spiconfig = 0x4000071c; ets_efuse_usb_print_is_disabled = 0x40000720; -ets_efuse_get_uart_print_channel = 0x40000724; +/*ets_efuse_get_uart_print_channel = 0x40000724;*/ +ets_efuse_usb_serial_jtag_print_is_disabled = 0x40000724; ets_efuse_get_uart_print_control = 0x40000728; ets_efuse_get_wp_pad = 0x4000072c; ets_efuse_legacy_spi_boot_mode_disabled = 0x40000730; diff --git a/components/esp_rom/esp32h2/ld/esp32h2.rom.ld b/components/esp_rom/esp32h2/ld/esp32h2.rom.ld index fefad99c3d..670d8c7811 100644 --- a/components/esp_rom/esp32h2/ld/esp32h2.rom.ld +++ b/components/esp_rom/esp32h2/ld/esp32h2.rom.ld @@ -492,7 +492,8 @@ ets_efuse_get_flash_delay_us = 0x4000071c; ets_efuse_get_mac = 0x40000720; ets_efuse_get_spiconfig = 0x40000724; ets_efuse_usb_print_is_disabled = 0x40000728; -ets_efuse_get_uart_print_channel = 0x4000072c; +/*ets_efuse_get_uart_print_channel = 0x4000072c;*/ +ets_efuse_usb_serial_jtag_print_is_disabled = 0x4000072c; ets_efuse_get_uart_print_control = 0x40000730; ets_efuse_get_wp_pad = 0x40000734; ets_efuse_direct_boot_mode_disabled = 0x40000738; diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index 88645cf8f7..92ea3818e9 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -613,7 +613,8 @@ ets_efuse_get_flash_delay_us = 0x40001f5c; ets_efuse_get_mac = 0x40001f68; ets_efuse_get_spiconfig = 0x40001f74; ets_efuse_usb_print_is_disabled = 0x40001f80; -ets_efuse_get_uart_print_channel = 0x40001f8c; +/*ets_efuse_get_uart_print_channel = 0x40001f8c;*/ +ets_efuse_usb_serial_jtag_print_is_disabled = 0x40001f8c; ets_efuse_get_uart_print_control = 0x40001f98; ets_efuse_get_wp_pad = 0x40001fa4; ets_efuse_legacy_spi_boot_mode_disabled = 0x40001fb0; diff --git a/components/esp_rom/include/esp32c3/rom/efuse.h b/components/esp_rom/include/esp32c3/rom/efuse.h index 9da1525f96..d1412c4611 100644 --- a/components/esp_rom/include/esp32c3/rom/efuse.h +++ b/components/esp_rom/include/esp32c3/rom/efuse.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_EFUSE_H_ #define _ROM_EFUSE_H_ @@ -236,13 +228,13 @@ bool ets_efuse_legacy_spi_boot_mode_disabled(void); uint32_t ets_efuse_get_uart_print_control(void); /** - * @brief Read which channel will used by ROM to print + * @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse * * @return - * - 0 for UART0. - * - 1 for UART1. + * - 1 for efuse disable USB-Serial-JTAG print during rom boot. + * - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot. */ -uint32_t ets_efuse_get_uart_print_channel(void); +uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void); /** * @brief Read if usb download mode disabled from Efuse diff --git a/components/esp_rom/include/esp32h2/rom/efuse.h b/components/esp_rom/include/esp32h2/rom/efuse.h index 9da1525f96..d1412c4611 100644 --- a/components/esp_rom/include/esp32h2/rom/efuse.h +++ b/components/esp_rom/include/esp32h2/rom/efuse.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_EFUSE_H_ #define _ROM_EFUSE_H_ @@ -236,13 +228,13 @@ bool ets_efuse_legacy_spi_boot_mode_disabled(void); uint32_t ets_efuse_get_uart_print_control(void); /** - * @brief Read which channel will used by ROM to print + * @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse * * @return - * - 0 for UART0. - * - 1 for UART1. + * - 1 for efuse disable USB-Serial-JTAG print during rom boot. + * - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot. */ -uint32_t ets_efuse_get_uart_print_channel(void); +uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void); /** * @brief Read if usb download mode disabled from Efuse diff --git a/components/esp_rom/include/esp32s3/rom/efuse.h b/components/esp_rom/include/esp32s3/rom/efuse.h index cbe38e6a55..3d347f4833 100644 --- a/components/esp_rom/include/esp32s3/rom/efuse.h +++ b/components/esp_rom/include/esp32s3/rom/efuse.h @@ -1,16 +1,8 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -237,13 +229,13 @@ bool ets_efuse_legacy_spi_boot_mode_disabled(void); uint32_t ets_efuse_get_uart_print_control(void); /** - * @brief Read which channel will used by ROM to print + * @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse * * @return - * - 0 for UART0. - * - 1 for UART1. + * - 1 for efuse disable USB-Serial-JTAG print during rom boot. + * - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot. */ -uint32_t ets_efuse_get_uart_print_channel(void); +uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void); /** * @brief Read if usb download mode disabled from Efuse diff --git a/components/esptool_py/esptool b/components/esptool_py/esptool index aca9d70bd8..e53efcf84c 160000 --- a/components/esptool_py/esptool +++ b/components/esptool_py/esptool @@ -1 +1 @@ -Subproject commit aca9d70bd810c25bc953ca2f7587892c4dbaffc4 +Subproject commit e53efcf84ceb6fac315ccb1348d6950ac33af309 diff --git a/components/soc/esp32c3/include/soc/efuse_reg.h b/components/soc/esp32c3/include/soc/efuse_reg.h index 0ec191f438..868046c521 100644 --- a/components/soc/esp32c3/include/soc/efuse_reg.h +++ b/components/soc/esp32c3/include/soc/efuse_reg.h @@ -293,30 +293,30 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */ -/*description: Set this bit to disable UART download mode through USB.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */ +/*description: Set this bit to disable download through USB-Serial-JTAG.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4 /* EFUSE_RPT4_RESERVED8 : R/W ;bitpos:[3] ;default: 1'b0 ; */ /*description: Reserved (used for four backups method).*/ #define EFUSE_RPT4_RESERVED8 (BIT(3)) #define EFUSE_RPT4_RESERVED8_M (BIT(3)) #define EFUSE_RPT4_RESERVED8_V 0x1 #define EFUSE_RPT4_RESERVED8_S 3 -/* EFUSE_UART_PRINT_CHANNEL : R/W ;bitpos:[2] ;default: 1'b0 ; */ -/*description: Selectes the default UART print channel. 0: UART0. 1: UART1.*/ -#define EFUSE_UART_PRINT_CHANNEL (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */ -/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : R/W ;bitpos:[2] ;default: 1'b0 ; */ +/*description: Disable USB-Serial-JTAG print during rom boot.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2 +/* EFUSE_DIS_DIRECT_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */ +/*description: Set this bit to disable direct boot*/ +#define EFUSE_DIS_DIRECT_BOOT (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_S 1 /* EFUSE_DIS_DOWNLOAD_MODE : R/W ;bitpos:[0] ;default: 1'b0 ; */ /*description: Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/ #define EFUSE_DIS_DOWNLOAD_MODE (BIT(0)) @@ -645,30 +645,30 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ -/*description: The value of DIS_USB_DOWNLOAD_MODE.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ +/*description: The value of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4 /* EFUSE_RPT4_RESERVED8 : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: Reserved.*/ #define EFUSE_RPT4_RESERVED8 (BIT(3)) #define EFUSE_RPT4_RESERVED8_M (BIT(3)) #define EFUSE_RPT4_RESERVED8_V 0x1 #define EFUSE_RPT4_RESERVED8_S 3 -/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */ -/*description: The value of UART_PRINT_CHANNEL.*/ -#define EFUSE_UART_PRINT_CHANNEL (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ -/*description: The value of DIS_LEGACY_SPI_BOOT.*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : RO ;bitpos:[2] ;default: 1'b0 ; */ +/*description: The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2 +/* EFUSE_DIS_DIRECT_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ +/*description: The value of DIS_DIRECT_BOOT.*/ +#define EFUSE_DIS_DIRECT_BOOT (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_S 1 /* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: The value of DIS_DOWNLOAD_MODE.*/ #define EFUSE_DIS_DOWNLOAD_MODE (BIT(0)) @@ -1597,30 +1597,30 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ -/*description: If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ +/*description: If DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_S 4 /* EFUSE_RPT4_RESERVED8_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: Reserved.*/ #define EFUSE_RPT4_RESERVED8_ERR (BIT(3)) #define EFUSE_RPT4_RESERVED8_ERR_M (BIT(3)) #define EFUSE_RPT4_RESERVED8_ERR_V 0x1 #define EFUSE_RPT4_RESERVED8_ERR_S 3 -/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ -/*description: If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/ -#define EFUSE_UART_PRINT_CHANNEL_ERR (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_ERR_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ -/*description: If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ +/*description: If DIS_USB_SERIAL_JTAG_ROM_PRINT is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_S 2 +/* EFUSE_DIS_DIRECT_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ +/*description: If DIS_DIRECT_BOOT is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_DIRECT_BOOT_ERR (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_ERR_S 1 /* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ #define EFUSE_DIS_DOWNLOAD_MODE_ERR (BIT(0)) diff --git a/components/soc/esp32c3/include/soc/efuse_struct.h b/components/soc/esp32c3/include/soc/efuse_struct.h index 358d78c9a3..7df54a14ad 100644 --- a/components/soc/esp32c3/include/soc/efuse_struct.h +++ b/components/soc/esp32c3/include/soc/efuse_struct.h @@ -73,17 +73,18 @@ typedef volatile struct efuse_dev_s { } pgm_data3; union { struct { - uint32_t dis_download_mode: 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/ - uint32_t dis_legacy_spi_boot: 1; /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/ - uint32_t uart_print_channel: 1; /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/ - uint32_t rpt4_reserved8: 1; /*Reserved (used for four backups method).*/ - uint32_t dis_usb_download_mode: 1; /*Set this bit to disable UART download mode through USB.*/ - uint32_t enable_security_download: 1; /*Set this bit to enable secure UART download mode.*/ - uint32_t uart_print_control: 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/ - uint32_t rpt4_reserved7: 5; /*Reserved (used for four backups method).*/ - uint32_t force_send_resume: 1; /*Set this bit to force ROM code to send a resume command during SPI boot.*/ - uint32_t secure_version: 16; /*Secure version (used by ESP-IDF anti-rollback feature).*/ - uint32_t rpt4_reserved1: 2; /*Reserved (used for four backups method).*/ + uint32_t dis_download_mode: 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/ + uint32_t dis_direct_boot: 1; /*Set this bit to disable direct boot.*/ + uint32_t dis_usb_serial_jtag_rom_print: 1; /*Set this bit to disable USB-Serial-JTAG print during rom boot*/ + uint32_t rpt4_reserved8: 1; /*Reserved (used for four backups method).*/ + uint32_t dis_usb_serial_jtag_download_mode: 1; /*Set this bit to disable download mode through USB-Serial-JTAG.*/ + uint32_t enable_security_download: 1; /*Set this bit to enable secure UART download mode.*/ + uint32_t uart_print_control: 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/ + uint32_t rpt4_reserved7: 5; /*Reserved (used for four backups method).*/ + uint32_t force_send_resume: 1; /*Set this bit to force ROM code to send a resume command during SPI boot.*/ + uint32_t secure_version: 16; /*Secure version (used by ESP-IDF anti-rollback feature).*/ + uint32_t rpt4_reserved1: 1; /*Reserved (used for four backups method).*/ + uint32_t err_rst_enable: 1; /*Use BLOCK0 to check error record registers, 0 - without check.*/ }; uint32_t val; } pgm_data4; @@ -155,10 +156,10 @@ typedef volatile struct efuse_dev_s { union { struct { uint32_t dis_download_mode: 1; /*The value of DIS_DOWNLOAD_MODE.*/ - uint32_t dis_legacy_spi_boot: 1; /*The value of DIS_LEGACY_SPI_BOOT.*/ - uint32_t uart_print_channel: 1; /*The value of UART_PRINT_CHANNEL.*/ + uint32_t dis_direct_boot: 1; /*The value of DIS_DIRECT_BOOT.*/ + uint32_t dis_usb_serial_jtag_rom_print:1; /*The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/ uint32_t rpt4_reserved8: 1; /*Reserved.*/ - uint32_t dis_usb_download_mode: 1; /*The value of DIS_USB_DOWNLOAD_MODE.*/ + uint32_t dis_usb_serial_jtag_download_mode: 1; /*The value of dis_usb_serial_jtag_download_mode.*/ uint32_t enable_security_download: 1; /*The value of ENABLE_SECURITY_DOWNLOAD.*/ uint32_t uart_print_control: 2; /*The value of UART_PRINT_CONTROL.*/ uint32_t rpt4_reserved7: 5; /*Reserved.*/ @@ -319,17 +320,18 @@ typedef volatile struct efuse_dev_s { } rd_repeat_err2; union { struct { - uint32_t dis_download_mode_err: 1; /*If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ - uint32_t dis_legacy_spi_boot_err: 1; /*If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/ - uint32_t uart_print_channel_err: 1; /*If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/ + uint32_t dis_download_mode_err: 1; /*If the value is not zero then it indicates a programming error on DIS_DOWNLOAD_MODE.*/ + uint32_t dis_direct_boot_err: 1; /*If the value is not zero then it indicates a programming error on DIS_DIRECT_BOOT.*/ + uint32_t dis_usb_serial_jtag_rom_print_err:1; /*If the value is not zero then it indicates a programming error on DIS_USB_SERIAL_JTAG_ROM_PRINT.*/ uint32_t rpt4_reserved8_err: 1; /*Reserved.*/ - uint32_t dis_usb_download_mode_err: 1; /*If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ - uint32_t enable_security_download_err: 1; /*If ENABLE_SECURITY_DOWNLOAD is 1 then it indicates a programming error.*/ - uint32_t uart_print_control_err: 2; /*If any bit in UART_PRINT_CONTROL is 1 then it indicates a programming error.*/ + uint32_t dis_usb_serial_jtag_download_mode_err: 1; /*If the value is not zero then it indicates a programming error on DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/ + uint32_t enable_security_download_err: 1; /*If the value is not zero then it indicates a programming error on ENABLE_SECURITY_DOWNLOAD.*/ + uint32_t uart_print_control_err: 2; /*If the value is not zero then it indicates a programming error on UART_PRINT_CONTROL.*/ uint32_t rpt4_reserved7_err: 5; /*Reserved*/ - uint32_t force_send_resume_err: 1; /*If FORCE_SEND_RESUME is 1 then it indicates a programming error.*/ - uint32_t secure_version_err: 16; /*If any bit in SECURE_VERSION is 1 then it indicates a programming error.*/ - uint32_t rpt4_reserved1_err: 2; /*Reserved.*/ + uint32_t force_send_resume_err: 1; /*If the value is not zero then it indicates a programming error on FORCE_SEND_RESUME.*/ + uint32_t secure_version_err: 16; /*If the value is not zero then it indicates a programming error on SECURE_VERSION.*/ + uint32_t rpt4_reserved1_err: 1; /*Reserved.*/ + uint32_t err_rst_enable_err: 1; /*Use BLOCK0 to check error record registers, 0 - without check.*/ }; uint32_t val; } rd_repeat_err3; diff --git a/components/soc/esp32h2/include/soc/efuse_reg.h b/components/soc/esp32h2/include/soc/efuse_reg.h index fc55f2938e..2d3e8dc0fa 100644 --- a/components/soc/esp32h2/include/soc/efuse_reg.h +++ b/components/soc/esp32h2/include/soc/efuse_reg.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_EFUSE_REG_H_ #define _SOC_EFUSE_REG_H_ @@ -319,12 +311,12 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */ -/*description: Set this bit to disable UART download mode through USB.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */ +/*description: Set this bit to disable download through USB-Serial-JTAG.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4 /* EFUSE_FLASH_ECC_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */ /*description: Set ECC mode in ROM 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode.*/ @@ -332,18 +324,17 @@ extern "C" { #define EFUSE_FLASH_ECC_MODE_M (BIT(3)) #define EFUSE_FLASH_ECC_MODE_V 0x1 #define EFUSE_FLASH_ECC_MODE_S 3 -/* EFUSE_UART_PRINT_CHANNEL : R/W ;bitpos:[2] ;default: 1'b0 ; */ -/*description: Selectes the default UART print channel. 0: UART0. 1: UART1.*/ -#define EFUSE_UART_PRINT_CHANNEL (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */ -/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1 +/*description: Disable USB-Serial-JTAG print during rom boot.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2 +/* EFUSE_DIS_DIRECT_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */ +/*description: Set this bit to disable direct boot..*/ +#define EFUSE_DIS_DIRECT_BOOT (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_S 1 /* EFUSE_DIS_DOWNLOAD_MODE : R/W ;bitpos:[0] ;default: 1'b0 ; */ /*description: Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/ #define EFUSE_DIS_DOWNLOAD_MODE (BIT(0)) @@ -690,30 +681,30 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ -/*description: The value of DIS_USB_DOWNLOAD_MODE.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ +/*description: The value of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4 /* EFUSE_FLASH_ECC_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: The value of FLASH_ECC_MODE.*/ #define EFUSE_FLASH_ECC_MODE (BIT(3)) #define EFUSE_FLASH_ECC_MODE_M (BIT(3)) #define EFUSE_FLASH_ECC_MODE_V 0x1 #define EFUSE_FLASH_ECC_MODE_S 3 -/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */ -/*description: The value of UART_PRINT_CHANNEL.*/ -#define EFUSE_UART_PRINT_CHANNEL (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ -/*description: The value of DIS_LEGACY_SPI_BOOT.*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : RO ;bitpos:[2] ;default: 1'b0 ; */ +/*description: The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2 +/* EFUSE_DIS_DIRECT_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ +/*description: The value of DIS_DIRECT_BOOT.*/ +#define EFUSE_DIS_DIRECT_BOOT (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_S 1 /* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: The value of DIS_DOWNLOAD_MODE.*/ #define EFUSE_DIS_DOWNLOAD_MODE (BIT(0)) @@ -1660,30 +1651,30 @@ extern "C" { #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ -/*description: If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ +/*description: If DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_S 4 /* EFUSE_FLASH_ECC_MODE_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: If FLASH_ECC_MODE is 1 then it indicates a programming error.*/ #define EFUSE_FLASH_ECC_MODE_ERR (BIT(3)) #define EFUSE_FLASH_ECC_MODE_ERR_M (BIT(3)) #define EFUSE_FLASH_ECC_MODE_ERR_V 0x1 #define EFUSE_FLASH_ECC_MODE_ERR_S 3 -/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ -/*description: If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/ -#define EFUSE_UART_PRINT_CHANNEL_ERR (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_ERR_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ -/*description: If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ +/*description: If DIS_USB_SERIAL_JTAG_ROM_PRINT is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_S 2 +/* EFUSE_DIS_DIRECT_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ +/*description: If DIS_DIRECT_BOOT_ERR is 1 then it indicates a programming error.*/ +#define EFUSE_DIS_DIRECT_BOOT_ERR (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_ERR_S 1 /* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ #define EFUSE_DIS_DOWNLOAD_MODE_ERR (BIT(0)) diff --git a/components/soc/esp32h2/include/soc/efuse_struct.h b/components/soc/esp32h2/include/soc/efuse_struct.h index 4c5af9d8c7..ce71cf7696 100644 --- a/components/soc/esp32h2/include/soc/efuse_struct.h +++ b/components/soc/esp32h2/include/soc/efuse_struct.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_EFUSE_STRUCT_H_ #define _SOC_EFUSE_STRUCT_H_ #ifdef __cplusplus @@ -74,10 +66,10 @@ typedef volatile struct efuse_dev_s { union { struct { uint32_t dis_download_mode: 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/ - uint32_t dis_legacy_spi_boot: 1; /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/ - uint32_t uart_print_channel: 1; /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/ + uint32_t dis_direct_boot: 1; /*Set this bit to disable direct boot.*/ + uint32_t dis_usb_serial_jtag_rom_print: 1; /*Set this bit to disable USB-Serial-JTAG print during rom boot*/ uint32_t flash_ecc_mode: 1; /*Set ECC mode in ROM 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode.*/ - uint32_t dis_usb_download_mode: 1; /*Set this bit to disable UART download mode through USB.*/ + uint32_t dis_usb_serial_jtag_download_mode: 1; /*Set this bit to disable download mode through USB-Serial-JTAG.*/ uint32_t enable_security_download: 1; /*Set this bit to enable secure UART download mode.*/ uint32_t uart_print_control: 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/ uint32_t pin_power_selection: 1; /*GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI.*/ @@ -158,10 +150,10 @@ typedef volatile struct efuse_dev_s { union { struct { uint32_t dis_download_mode: 1; /*The value of DIS_DOWNLOAD_MODE.*/ - uint32_t dis_legacy_spi_boot: 1; /*The value of DIS_LEGACY_SPI_BOOT.*/ - uint32_t uart_print_channel: 1; /*The value of UART_PRINT_CHANNEL.*/ + uint32_t dis_direct_boot: 1; /*The value of DIS_DIRECT_BOOT.*/ + uint32_t dis_usb_serial_jtag_rom_print: 1; /*The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/ uint32_t flash_ecc_mode: 1; /*The value of FLASH_ECC_MODE.*/ - uint32_t dis_usb_download_mode: 1; /*The value of DIS_USB_DOWNLOAD_MODE.*/ + uint32_t dis_usb_serial_jtag_download_mode: 1; /*The value of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/ uint32_t enable_security_download: 1; /*The value of ENABLE_SECURITY_DOWNLOAD.*/ uint32_t uart_print_control: 2; /*The value of UART_PRINT_CONTROL.*/ uint32_t pin_power_selection: 1; /*The value of PIN_POWER_SELECTION.*/ @@ -325,11 +317,11 @@ typedef volatile struct efuse_dev_s { } rd_repeat_err2; union { struct { - uint32_t dis_download_mode_err: 1; /*If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ - uint32_t dis_legacy_spi_boot_err: 1; /*If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/ - uint32_t uart_print_channel_err: 1; /*If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/ + uint32_t dis_download_mode_err: 1; /*If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ + uint32_t dis_direct_boot_err: 1; /*If DIS_DIRECT_BOOT is 1 then it indicates a programming error.*/ + uint32_t dis_usb_serial_jtag_rom_print_err: 1; /*If DIS_USB_SERIAL_JTAG_ROM_PRINT is 1 then it indicates a programming error.*/ uint32_t flash_ecc_mode_err: 1; /*If FLASH_ECC_MODE is 1 then it indicates a programming error.*/ - uint32_t dis_usb_download_mode_err: 1; /*If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ + uint32_t dis_usb_serial_jtag_download_mode_err: 1; /*If DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE is 1 then it indicates a programming error.*/ uint32_t enable_security_download_err: 1; /*If ENABLE_SECURITY_DOWNLOAD is 1 then it indicates a programming error.*/ uint32_t uart_print_control_err: 2; /*If any bit in UART_PRINT_CONTROL is 1 then it indicates a programming error.*/ uint32_t pin_power_selection_err: 1; /*If PIN_POWER_SELECTION is 1 then it indicates a programming error.*/ diff --git a/components/soc/esp32s3/include/soc/efuse_reg.h b/components/soc/esp32s3/include/soc/efuse_reg.h index b4d10f3f66..df7a70a56f 100644 --- a/components/soc/esp32s3/include/soc/efuse_reg.h +++ b/components/soc/esp32s3/include/soc/efuse_reg.h @@ -429,18 +429,18 @@ apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/ #define EFUSE_KEY_PURPOSE_2_S 0 #define EFUSE_RD_REPEAT_DATA3_REG (DR_REG_EFUSE_BASE + 0x3C) -/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31] ;default: 1'h0 ; */ -/*description: Reserved (used for four backups method)..*/ -#define EFUSE_RPT4_RESERVED1 (BIT(31)) -#define EFUSE_RPT4_RESERVED1_M (BIT(31)) +/* EFUSE_DIS_USB_OTG_DOWNLOAD_MODE : RO ;bitpos:[31] ;default: 1'h0 ; */ +/*description: Set this bit to disable download through USB-OTG*/ +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE (BIT(31)) +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_M (BIT(31)) +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_S 31 +/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[30] ;default: 1'h0 ; */ +/*description: Reserved (used for four backups method).*/ +#define EFUSE_RPT4_RESERVED1 (BIT(30)) +#define EFUSE_RPT4_RESERVED1_M (BIT(30)) #define EFUSE_RPT4_RESERVED1_V 0x1 -#define EFUSE_RPT4_RESERVED1_S 31 -/* EFUSE_POWERGLITCH_EN : RO ;bitpos:[30] ;default: 1'b0 ; */ -/*description: Set this bit to enable power glitch function..*/ -#define EFUSE_POWERGLITCH_EN (BIT(30)) -#define EFUSE_POWERGLITCH_EN_M (BIT(30)) -#define EFUSE_POWERGLITCH_EN_V 0x1 -#define EFUSE_POWERGLITCH_EN_S 30 +#define EFUSE_RPT4_RESERVED1_S 30 /* EFUSE_SECURE_VERSION : RO ;bitpos:[29:14] ;default: 16'h0 ; */ /*description: Secure version (used by ESP-IDF anti-rollback feature)..*/ #define EFUSE_SECURE_VERSION 0x0000FFFF @@ -490,12 +490,12 @@ apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/ #define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ -/*description: Set this bit to disable UART download mode through USB..*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4 +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */ +/*description: Set this bit to disable download through USB-Seial-JTAG.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4 /* EFUSE_FLASH_ECC_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode..*/ @@ -503,18 +503,18 @@ apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/ #define EFUSE_FLASH_ECC_MODE_M (BIT(3)) #define EFUSE_FLASH_ECC_MODE_V 0x1 #define EFUSE_FLASH_ECC_MODE_S 3 -/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */ -/*description: Selectes the default UART print channel. 0: UART0. 1: UART1..*/ -#define EFUSE_UART_PRINT_CHANNEL (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ -/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4)..*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1 +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : RO ;bitpos:[2] ;default: 1'b0 ; */ +/*description: Disable USB-Serial-JTAG print during rom boot.*/ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2 +/* EFUSE_DIS_DIRECT_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */ +/*description: Set this bit to disable direct boot.*/ +#define EFUSE_DIS_DIRECT_BOOT (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_S 1 /* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: Set this bit to disable download mode (boot_mode[3:0] = 0, 1, 2, 3, 6, 7)..*/ #define EFUSE_DIS_DOWNLOAD_MODE (BIT(0)) @@ -1473,18 +1473,18 @@ apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/ #define EFUSE_KEY_PURPOSE_2_ERR_S 0 #define EFUSE_RD_REPEAT_ERR3_REG (DR_REG_EFUSE_BASE + 0x188) -/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[31] ;default: 1'h0 ; */ -/*description: Reserved..*/ -#define EFUSE_RPT4_RESERVED1_ERR (BIT(31)) -#define EFUSE_RPT4_RESERVED1_ERR_M (BIT(31)) +/* EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR : RO ;bitpos:[31] ;default: 1'h0 ; */ +/*description: Set this bit to disable download through USB-OTG.*/ +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR (BIT(31)) +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_M (BIT(31)) +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_V 0x1 +#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_S 31 +/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[30] ;default: 1'h0 ; */ +/*description: Reserved.*/ +#define EFUSE_RPT4_RESERVED1_ERR (BIT(30)) +#define EFUSE_RPT4_RESERVED1_ERR_M (BIT(30)) #define EFUSE_RPT4_RESERVED1_ERR_V 0x1 -#define EFUSE_RPT4_RESERVED1_ERR_S 31 -/* EFUSE_POWERGLITCH_EN_ERR : RO ;bitpos:[30] ;default: 1'b0 ; */ -/*description: .*/ -#define EFUSE_POWERGLITCH_EN_ERR (BIT(30)) -#define EFUSE_POWERGLITCH_EN_ERR_M (BIT(30)) -#define EFUSE_POWERGLITCH_EN_ERR_V 0x1 -#define EFUSE_POWERGLITCH_EN_ERR_S 30 +#define EFUSE_RPT4_RESERVED1_ERR_S 30 /* EFUSE_SECURE_VERSION_ERR : RO ;bitpos:[29:14] ;default: 16'h0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ #define EFUSE_SECURE_VERSION_ERR 0x0000FFFF @@ -1533,30 +1533,30 @@ apping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0..*/ #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M (BIT(5)) #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V 0x1 #define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S 5 -/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ +/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M (BIT(4)) -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V 0x1 -#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S 4 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_M (BIT(4)) +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_S 4 /* EFUSE_FLASH_ECC_MODE_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ #define EFUSE_FLASH_ECC_MODE_ERR (BIT(3)) #define EFUSE_FLASH_ECC_MODE_ERR_M (BIT(3)) #define EFUSE_FLASH_ECC_MODE_ERR_V 0x1 #define EFUSE_FLASH_ECC_MODE_ERR_S 3 -/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ +/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ -#define EFUSE_UART_PRINT_CHANNEL_ERR (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_M (BIT(2)) -#define EFUSE_UART_PRINT_CHANNEL_ERR_V 0x1 -#define EFUSE_UART_PRINT_CHANNEL_ERR_S 2 -/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_M (BIT(2)) +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_V 0x1 +#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_S 2 +/* EFUSE_DIS_DIRECT_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M (BIT(1)) -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V 0x1 -#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S 1 +#define EFUSE_DIS_DIRECT_BOOT_ERR (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_M (BIT(1)) +#define EFUSE_DIS_DIRECT_BOOT_ERR_V 0x1 +#define EFUSE_DIS_DIRECT_BOOT_ERR_S 1 /* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */ /*description: If any bits in this filed are 1, then it indicates a programming error..*/ #define EFUSE_DIS_DOWNLOAD_MODE_ERR (BIT(0)) diff --git a/components/soc/esp32s3/include/soc/efuse_struct.h b/components/soc/esp32s3/include/soc/efuse_struct.h index bd45983ba2..fb62d48ce7 100644 --- a/components/soc/esp32s3/include/soc/efuse_struct.h +++ b/components/soc/esp32s3/include/soc/efuse_struct.h @@ -101,10 +101,10 @@ typedef volatile struct efuse_dev_s { union { struct { uint32_t reg_dis_download_mode : 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0, 1, 2, 3, 6, 7).*/ - uint32_t reg_dis_legacy_spi_boot : 1; /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/ - uint32_t reg_uart_print_channel : 1; /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/ + uint32_t reg_dis_direct_boot : 1; /*Set this bit to disable direct boot..*/ + uint32_t dis_usb_serial_jtag_rom_print : 1; /*Set this bit to disable USB-Serial-JTAG print during rom boot*/ uint32_t reg_flash_ecc_mode : 1; /*Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode.*/ - uint32_t reg_dis_usb_download_mode : 1; /*Set this bit to disable UART download mode through USB.*/ + uint32_t reg_dis_usb_serial_jtag_download_mode: 1; /*Set this bit to disable download through USB-Serial-JTAG.*/ uint32_t reg_enable_security_download : 1; /*Set this bit to enable secure UART download mode.*/ uint32_t reg_uart_print_control : 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/ uint32_t reg_pin_power_selection : 1; /*GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI.*/ @@ -113,8 +113,8 @@ typedef volatile struct efuse_dev_s { uint32_t reg_flash_ecc_en : 1; /*Set 1 to enable ECC for flash boot.*/ uint32_t reg_force_send_resume : 1; /*Set this bit to force ROM code to send a resume command during SPI boot.*/ uint32_t reg_secure_version : 16; /*Secure version (used by ESP-IDF anti-rollback feature).*/ - uint32_t reg_powerglitch_en : 1; /*Set this bit to enable power glitch function.*/ uint32_t reg_rpt4_reserved1 : 1; /*Reserved (used for four backups method).*/ + uint32_t reg_dis_usb_otg_download_mode : 1; /*Set this bit to disable download through USB-OTG*/ }; uint32_t val; } rd_repeat_data3; @@ -283,10 +283,10 @@ typedef volatile struct efuse_dev_s { union { struct { uint32_t reg_dis_download_mode_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ - uint32_t reg_dis_legacy_spi_boot_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ - uint32_t reg_uart_print_channel_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ + uint32_t reg_dis_direct_boot_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ + uint32_t reg_dis_usb_serial_jtag_rom_print_err:1;/*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_flash_ecc_mode_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ - uint32_t reg_dis_usb_download_mode_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ + uint32_t reg_dis_usb_serial_jtag_download_mode_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_enable_security_download_err: 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_uart_print_control_err : 2; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_pin_power_selection_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ @@ -294,9 +294,9 @@ typedef volatile struct efuse_dev_s { uint32_t reg_flash_page_size_err : 2; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_flash_ecc_en_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_force_send_resume_err : 1; /*If any bits in this filed are 1, then it indicates a programming error.*/ - uint32_t reg_secure_version_err : 16; /*If any bits in this filed are 1, then it indicates a programming error.*/ - uint32_t reg_powerglitch_en_err : 1; + uint32_t reg_secure_version_err : 16; /*If any bits in this filed are 1, then it indicates a programming error.*/ uint32_t reg_rpt4_reserved1_err : 1; /*Reserved.*/ + uint32_t reg_dis_usb_otg_download_mode_err: 1; /*Set this bit to disable download through USB-OTG*/ }; uint32_t val; } rd_repeat_err3; diff --git a/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C3.rst b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C3.rst index 7f87e9954a..dd678f5551 100644 --- a/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C3.rst +++ b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-C3.rst @@ -16,8 +16,8 @@ BTLC_GPIO_ENABLE (BLOCK0) Enable btlc gpio = 0 R/W (0b00) POWERGLITCH_EN (BLOCK0) Set this bit to enable power glitch function = False R/W (0b0) POWER_GLITCH_DSENSE (BLOCK0) Sample delay configuration of power glitch = 0 R/W (0b00) - DIS_LEGACY_SPI_BOOT (BLOCK0) Disables Legacy SPI boot mode = False R/W (0b0) - UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0) + DIS_DIRECT_BOOT (BLOCK0) Disables direct boot mode = False R/W (0b0) + DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0) UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00) FORCE_SEND_RESUME (BLOCK0) Force ROM code to send a resume command during SPI = False R/W (0b0) bootduring SPI boot @@ -128,7 +128,7 @@ DIS_USB_DEVICE (BLOCK0) Disables USB DEVICE = False R/W (0b0) DIS_USB (BLOCK0) Disables the USB OTG hardware = False R/W (0b0) USB_EXCHG_PINS (BLOCK0) Exchanges USB D+ and D- pins = False R/W (0b0) - DIS_USB_DOWNLOAD_MODE (BLOCK0) Disables use of USB in UART download boot mode = False R/W (0b0) + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disables download through USB-Serial-JTAG = False R/W (0b0) Vdd_Spi Config fuses: PIN_POWER_SELECTION (BLOCK0) GPIO33-GPIO37 power supply selection in ROM code = VDD3P3_CPU R/W (0b0) diff --git a/docs/en/api-reference/system/inc/espefuse_summary_ESP32-S3.rst b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-S3.rst index 8248dd1ffc..ce5fcd06b5 100644 --- a/docs/en/api-reference/system/inc/espefuse_summary_ESP32-S3.rst +++ b/docs/en/api-reference/system/inc/espefuse_summary_ESP32-S3.rst @@ -38,9 +38,9 @@ FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up, = 0 R/W (0x0) unit is (ms/2). When the value is 15, delay is 7. 5 ms - DIS_LEGACY_SPI_BOOT (BLOCK0) Disables Legacy SPI boot mode = False R/W (0b0) - UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0) - DIS_USB_DOWNLOAD_MODE (BLOCK0) Disables use of USB in UART download boot mode = False R/W (0b0) + DIS_DIRECT_BOOT (BLOCK0) Disables direct boot mode = False R/W (0b0) + DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0) + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disables download through USB-Serial-JTAG = False R/W (0b0) UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00) FLASH_TYPE (BLOCK0) Selects SPI flash type = 4 data lines R/W (0b0) FORCE_SEND_RESUME (BLOCK0) Forces ROM code to send an SPI flash resume comman = False R/W (0b0)