From e89352080fe78feaccdf1e4052bcafe51d284448 Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Tue, 22 Apr 2025 18:02:16 +0300 Subject: [PATCH] fix(esp_common): Fix DRAM_DMA_ALIGNED_ATTR for P4 --- components/esp_common/include/esp_attr.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_common/include/esp_attr.h b/components/esp_common/include/esp_attr.h index ee5a94a310..00d6cb5407 100644 --- a/components/esp_common/include/esp_attr.h +++ b/components/esp_common/include/esp_attr.h @@ -1,6 +1,6 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -61,7 +61,7 @@ extern "C" { #define DMA_ATTR WORD_ALIGNED_ATTR DRAM_ATTR //Force data to be placed in DRAM and aligned according to DMA and cache's requirement -#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE +#if CONFIG_SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE #define DRAM_DMA_ALIGNED_ATTR __attribute__((aligned(CONFIG_CACHE_L1_CACHE_LINE_SIZE))) DRAM_ATTR #else #define DRAM_DMA_ALIGNED_ATTR WORD_ALIGNED_ATTR DRAM_ATTR